Specifications

S1C6S2N7 TECHNICAL HARDWARE EPSON I-69
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Interrupt and HALT)
When an interrupt request is input to the CPU, the CPU
begins interrupt processing. After the program being exe-
cuted is suspended, interrupt processing is executed in the
following order:
➀ The address data (value of the program counter) of the
program step to be executed next is saved on the stack
(RAM).
➁ The interrupt request causes the value of the interrupt
vector (page 1, 01H–0FH) to be loaded into the program
counter.
➂ The program at the specified address is executed (execu-
tion of interrupt processing routine).
The processing in steps 1 and 2, above, takes 12 cycles of the
CPU system clock.
Interrupt vectors
Note