Specifications

S1C6S2N7 TECHNICAL HARDWARE EPSON I-67
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Interrupt and HALT)
Table 4.11.1 shows the factors that generate interrupt
requests.
The interrupt factor flags are set to 1 depending on the
corresponding interrupt factors.
The CPU is interrupted when the following two conditions
occur and an interrupt factor flag is set to 1.
• The corresponding mask register is 1 (enabled)
• The interrupt flag is 1 (EI)
The interrupt factor flag is a read-only register, but can be
reset to 0 when the register data is read.
After an initial reset, the interrupt factor flags are reset to 0.
Interrupt factors
Reading of interrupt factor flags is available at EI, but be careful in
the following cases.
If the interrupt mask register value corresponding to the interrupt
factor flags to be read is set to 1, an interrupt request will be
generated by the interrupt factor flags set timing, or an interrupt
request will not be generated. Be very careful when interrupt factor
flags are in the same address.
Note
Interrupt Factor
Clock timer 2 Hz falling edge
Clock timer 8 Hz falling edge
Clock timer 32 Hz falling edge
Stopwatch timer
1 Hz falling edge
Stopwatch timer
10 Hz falling edge
Input data (K00–K03)
rising edge
Motor driver
a sequence completion
Interrrupt Factor Flag
IT2
IT8
IT32
ISW1
ISW0
IK0
ISMD
(0EEH D1)
(0EEH D0)
(0EDH D0)
(0ECH D0)
(0EFH D2)
(0EFH D1)
(0EFH D0)
Table 4.11.1
Interrupt factors