Specifications

S1C6S2N7 TECHNICAL HARDWARE EPSON I-63
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Stepping Motor Driver)
Table 4.10.1 shows the motor driver control bits and their
addresses.
Table 4.10.1 Motor driver control bits
Control of motor
driver
0FEH
00 0
R
0
0
FRUN
FTRG
0
0
–
Motor driver status (reading)
Motor driver trigger (writing)
Run
Start
Stop
–
R
*5
*5
*5
FRUN
FTRG
R
W
Address Comment
Register
D3 D2 D1 D0 Name SR
*1
10
0ECH
0 0 ISMD
R
0
0
0
ISMD
0
Interrupt factor flag (motor driver)
Yes No
*5
*5
*5
0
0E9H
0 0 EISMD
RR/W
0
0
0
EISMD
Interrupt mask register (motor driver)
*5
*5
*5
0
Interrupt mask register (0E9H D0)
This register is used to mask the motor driver interrupt.
When 1 is written: Enabled
When 0 is written: Masked
Reading: Valid
After an initial reset, this register is set to 0.
EISMD