Specifications

I-42 EPSON S1C6S2N7 TECHNICAL HARDWARE
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (LCD Driver)
(1) Segment allocation
As shown in Figure 4.l.1, the S1C6S2N7 Series display
data is decided by the display data written to the display
memory (write-only) at address 090H–0AFH.
The address and bits of the display memory can be made
to correspond to the segment pins (SEG0–SEG25) in any
combination through mask option. This simplifies design
by increasing the degree of freedom with which the liquid
crystal panel can be designed.
Figure 4.6.8 shows an example of the relationship be-
tween the LCD segments (on the panel) and the display
memory in the case of 1/3 duty.
Mask option
(segment allocation)
Fig. 4.6.8
Segment allocation
aa'
f
f'
g'
g
ee'
d
d'
p'
p
c'
b'
b
c
SEG10 SEG11 SEG12
Common 0
Common 1
Common 2
09AH
09BH
09CH
09DH
Address
d
p
d'
p'
D3
c
g
c'
g'
D2
b
f
b'
f'
D1
a
e
a'
e'
D0
Data
Display data memory allocation
SEG10
SEG11
SEG12
9A, D0
(a)
9A, D1
(b)
9D, D1
(f')
9B, D1
(f)
9B, D2
(g)
9A, D2
(c)
9B, D0
(e)
9A, D3
(d)
9B, D3
(p)
Pin address allocation
Common 0 Common 1 Common 2