Specifications

I-24 EPSON S1C6S2N7 TECHNICAL HARDWARE
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Input Ports)
Interrupt mask registers (0E8H)
Masking the interrupt of the input port pins can be done
with these registers.
When 1 is written: Enable
When 0 is written: Mask
Reading: Valid
With these registers, masking of the input port bits can be
done for each of the four bits. After an initial reset, these
registers are all set to 0.
EIK00–EIK03
IK0 Interrupt factor flag (0EDH D0)
This flag indicates the occurrence of an input interrupt.
When 1 is read: Interrupt has occurred
When 0 is read: Interrupt has not occurred
Writing: Invalid
The interrupt factor flag IK0 is associated with K00–K03.
From the status of this flag, the software can decide whether
an input interrupt has occurred.
This flag is reset when the software has read it.
Reading of interrupt factor flag is available at EI, but be
careful in the following cases.
If the interrupt mask register value corresponding to the
interrupt factor flag to be read is set to 1, an interrupt
request will be generated by the interrupt factor flag set
timing, or an interrupt request will not be generated.
After an initial reset, this flag is set to 0.