Specifications

S1C6S2N7 TECHNICAL HARDWARE EPSON I-23
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Input Ports)
Table 4.3.1 list the input port control bits and their ad-
dresses.
Table 4.3.1 Input port control bits
Control of input port
Address Comment
Register
D3 D2 D1 D0 Name SR 1 0
0E0H
K03 K02 K01 K00
R
K03
K02
K01
K00
–
–
–
–
Input port (K00–K03)
High
High
High
High
Low
Low
Low
Low
0E8H
EIK03 EIK02 EIK01 EIK00
R/W
EIK03
EIK02
EIK01
EIK00
0
0
0
0
Interrupt mask register (K03)
Interrupt mask register (K02)
Interrupt mask register (K01)
Interrupt mask register (K00)
Enable
Enable
Enable
Enable
Mask
Mask
Mask
Mask
0EDH
0 0 IK0
R
0
0
0
IK0
0
Interrupt factor flag (K00–K03)
Yes No
0
K00–K03 Input port data (0E0H)
The input data of the input port pins can be read with these
registers.
When 1 is read: High level
When 0 is read: Low level
Writing: Invalid
The value read is 1 when the pin voltage of the four bits of
the input port (K00–K03) goes high (VDD), and 0 when the
voltage goes low (VSS). These bits are reading only, so
writing cannot be done.