Specifications

S1C6S2N7 TECHNICAL HARDWARE EPSON I-21
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Input Ports)
Fig. 4.3.3
Input interrupt timing
Input interrupt programing related precautions
When the content of the mask register is rewritten, while
the port K input is in the active status. The input interrupt
factor flag is set at ➀.
The interrupt mask registers (EIK00–EIK03) enable the
interrupt mask to be selected individually for K00–K03. An
interrupt occurs when the input value which are not
masked change and the interrupt factor flag (IK0) is set to 1.
When using an input interrupt, if you rewrite the content of
the mask register, when the value of the input terminal
which becomes the interrupt input is in the active status
(input terminal = high status), the factor flag for input
interrupt may be set.
For example, a factor flag is set with the timing of ➀ shown
in Figure 4.3.3. However, when clearing the content of the
mask register with the input terminal kept in the high
status and then setting it, the factor flag of the input inter-
rupt is again set at the timing that has been set.
Data bus
Address
Interrupt mask
register (EIK)
Kxx
Mask option
Noise
rejector
Interrupt factor
flag (IK0)
Interrupt
request
Address
Address
Port K input
Factor flag set Not set
Mask register
Active status
➀
Fig. 4.3.2
Input interrupt circuit
configuration
(K00–K03)