Specifications

S1C6S2N7 TECHNICAL SOFTWARE EPSON II-55
CHAPTER 3: PERIPHERAL CIRCUITS (Interrupt and Halt)
This flag is set to "1" when a falling edge is detected in the
timer TM1 (32 Hz) signal.
The contents of the IT32 flag can be loaded by software to
determine whether a 32 Hz timer interrupt has occured.
The flag is reset, when it is loaded by software. (See Figure
3.10.2.)
This flag is set to "1" when a falling edge is detected in the
timer TM1 (8 Hz) signal.
The contents of the IT8 flag can be loaded by software to
determine whether an 8 Hz timer interrupt has occured.
The flag is reset, when it is loaded by software. (See Figure
3.10.2.)
This flag is set to "1" when a falling edge is detected in the
timer TM1 (2 Hz) signal.
The contents of the IT2 flag can be loaded by software to
determine whether a 2 Hz timer interrupt has occured.
The flag is reset, when it is loaded by software. (See Figure
3.10.2.)
IT32
Fig. 3.10.2
Timer interrupt circuit
D0
D1
D2
Address 0EFH
D0
D1
D2
Address 0EBH
Timer interrupt
mask register (EIT)
Timer interrupt
factor flag (IT)
INT
(Interrupt request)
Interrupt flag (I)
Data bus
Data bus
Basic clock counter
32 Hz
8 Hz
2 Hz
IT2
IT8