Specifications

S1C6S2N7 TECHNICAL SOFTWARE EPSON II-3
CHAPTER 1: CONFIGURATION
Interrupt Vectors
When an interrupt request is received by the CPU, the CPU
initiates the following interrupt processing after completing
the instruction being executed.
(1)The address of the next instruction to be executed (the
value of the program counter) is saved on the stack
(RAM).
(2)The interrupt vector address corresponding to the inter-
rupt request is loaded into the program counter.
(3)The branch instruction written in the vector is executed
to branch to the software interrupt processing routine.
Steps 1 and 2 require 12 cycles of the CPU system clock.
The interrupt vectors are shown in Table 1.3.1.
1.3
Note
Table 1.3.1
Interrupt requests and vectors
Step Interrupt Vector
Initial reset
Clock timer interrupt (TINT)
Stopwatch interrupt (SWINT)
SWINT + TINT
Input (K00–K03) interrupt (KINT)
KINT + TINT
KINT + SWINT
KINT + SWINT + TINT
Motor driver interrupt (MDINT)
MDINT + TINT
MDINT + SWINT
MDINT + SWINT + TINT
MDINT + KINT
MDINT + KINT + TINT
MDINT + KINT + SWINT
MDINT + KINT + SWINT + TINT
Page
00H
01H
02H
03H
04H
05H
06H
07H
08H
09H
0AH
0BH
0CH
0DH
0EH
0FH
1
Addesses (start address of interrupt processing routines) to
jump to are written into the addresses available for interrupt
vector allocation.