Specifications
3 FUNCTION OPTION GENERATOR FOG6003
S5U1C60N03D MANUAL EPSON 13
(DEVELOPMENT SOFTWARE TOOL FOR S1C60N03)
*** OPTION NO.8 ***
--- R00 SPECIFICATION ---
OUTPUT TYPE 1. D.C.
2. /BZ R00
3. FOUT
PLEASE SELECT NO.(3) ? 3
F1 1. 256 [HZ]
2. 512 [HZ]
3. 1024 [HZ]
4. 2048 [HZ]
5. 4096 [HZ]
PLEASE SELECT NO.(4) ? 4
F2 1. 512 [HZ]
2. 1024 [HZ]
3. 2048 [HZ]
4. 4096 [HZ]
5. 8192 [HZ]
PLEASE SELECT NO.(4) ? 4
F3 1. 1024 [HZ]
2. 2048 [HZ]
3. 4096 [HZ]
4. 8192 [HZ]
5. 16384 [HZ]
PLEASE SELECT NO.(4) ? 4
F4 1. 2048 [HZ]
2. 4096 [HZ]
3. 8192 [HZ]
4. 16384 [HZ]
5. 32768 [HZ]
PLEASE SELECT NO.(4) ? 4
OUTPUT SPECIFICATION 1. COMPLEMENTARY
2. PCH-OPENDRAIN
PLEASE SELECT NO.(1) ? 1
OUTPUT TYPE 3. FOUT SELECTED
F1 4. 2048 [HZ] SELECTED
F2 4. 4096 [HZ] SELECTED
F3 4. 8192 [HZ] SELECTED
F4 4. 16384 [HZ] SELECTED
OUTPUT SPECIFICATION 1. COMPLEMENTARY SELECTED
Select the output specification for the R00 terminal.
Either complementary output or Pch open drain
output may be selected.
When "D.C." (DC output) is selected, R00 becomes a
regular output port.
When "/BZ R00" (buzzer inverted output, R00
control) is selected, by writing "1" to the R00
register, clock with frequency specified through the
software is generated from the R00 terminal.
When FOUT is selected, clock with frequency
selected from the R00 terminal is generated by
writing "1" to the R00 register.
When the DC output or buzzer inverted output is
selected as the output type, the FOUT frequencies
cannot be selected.
• When DC output is selected
When the R00 register is set to "1", the R00
terminal output goes high (V
DD), and goes low
(VSS) when set to "0".
Output waveform is shown in Figure 3.3.6.
• When buzzer inverted output (R00 control) is
selected
When the R00 register is set to "1", 50% duty and
V
DD–VSS amplitude square wave is generated at
the specified frequency by the software. When set
to "0", the R00 terminal goes low (VSS). The clock
phase when buzzer drive signal is output from R00
terminal is antiphase to that of the R01 terminal.
Output waveform is shown in Figure 3.3.7.
• When FOUT output is selected
When the R00 register is set to "1", 50% duty and
VDD–VSS amplitude square wave is generated at
the specified frequency. When set to "0", the
FOUT terminal goes low (VSS).
The F1 to F4 FOUT frequencies are set by mask
option. One of them is used by the software.
FOUT output is normally utilized to provide clock
to other devices but since hazard occurs at the
square wave breaks, great caution must be
observed when using it.
Output waveform is shown in Figure 3.3.8.
The output circuit configuration is shown in Figure
3.3.9.
8 R00 specification
Buzzer inverted output
R00 register 0 1 0
V
SS
VDD
FOUT output
R00 register 0 1 0
V
SS
V
DD
VDD
VSS
010
R00 output
R00 register
Output
register
V
DD
R
Complementary
Pch open drain
V
SS
Fig. 3.3.6 Output waveform at DC output selection
Fig. 3.3.7 Output waveform at buzzer inverted output selection
Fig. 3.3.8 Output waveform at FOUT output selection
Fig. 3.3.9
Configuration of output circuit