Specifications
Table Of Contents
- Technical Hardware
- 1 OVERVIEW
- 2 POWER SUPPLY AND INITIAL RESET
- 3 CPU, ROM, RAM
- 4 PERIPHERAL CIRCUITS AND OPERATION
- 4.1 Memory Map
- 4.2 Resetting Watchdog Timer
- 4.3 Oscillation Circuit
- 4.4 Input Ports (K00–K03, K10)
- 4.5 Output Ports (R00–R03)
- 4.6 I/O Ports (P00–P03, P10–P13, P20–P23)
- 4.7 LCD Driver (COM0–COM3, SEG0–SEG31)
- 4.8 Clock Timer
- 4.9 Stopwatch Timer
- 4.10 Programmable Timer
- 4.11 Serial Interface (SIN, SOUT, SCLK, SRDY)
- 4.12 A/D Converter
- 4.13 General-purpose Operation Amplifier (AMP)
- 4.14 SVD (Supply Voltage Detection) Circuit
- 4.15 Interrupt and HALT/SLEEP
- 5 SUMMARY OF NOTES
- 6 DIAGRAM OF BASIC EXTERNAL CONNECTIONS
- 7 CHARACTERISTICS
- 8 PACKAGE
- 9 PAD LAYOUT
- Technical Software
- 1 INTRODUCTION
- 2 BLOCK DIAGRAM
- 3 PROGRAM MEMORY (ROM)
- 4 DATA MEMORY
- 5 INITIAL RESET
- 6 PERIPHERAL CIRCUITS
- 6.1 Watchdog Timer
- 6.2 OSC3
- 6.3 Input Ports (K00–K03 and K10)
- 6.4 Output Ports (R00–R03)
- 6.5 I/O Ports (P00–P03, P10–P13 and P20–P23)
- 6.6 LCD Driver
- 6.7 Clock Timer
- 6.8 Stopwatch Timer
- 6.9 Programmable Timer
- 6.10 Serial Interface Circuit
- 6.11 Amplifier
- 6.12 SVD (Supply Voltage Detection) Circuit
- 6.13 A/D Converter
- 6.14 Sleep
- 6.15 Interrupt
- 7 SUMMARY OF NOTES
- APPENDIX

I-68 EPSON S1C62740 TECHNICAL HARDWARE
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Programmable Timer)
PT0–PT3, PT4–PT7:
Programmable timer data
(EBH, ECH)
Will read the data from the down-counter of the programmable
timer.
Will read the low-order 4 bits of the 8 bits counter data PT0–PT3,
and the high-order 4 bits PT4–PT7.
Because these 8 bits are only for reading, writing operation is
rendered invalid.
At initial reset, timer data will be undefined.
PTR01:
R01 output selection register
(E9H•D3)
Selects the output type for the R01 terminal.
When "1" is written: PTOVF signal output
When "0" is written: DC output
Reading: Valid
By setting the register PTR01 to "1", R01 is set to PTOVF (output
pulse of the programmable timer) output port. When PTR01 is set
to "0", R01 become the regular DC output port.
When the PTOVF output is selected, ON/OFF of the signal output
can be controlled by the R01 register. (See Section 4.5, "Output
Ports".)
At initial reset, this register is set to "0".
EIPT:
Interrupt mask register
(C8H•D0)
This register is used to select whether to mask the programmable
timer interrupt.
When "1" is written: Enabled
When "0" is written: Masked
Reading: Valid
With this register, masking of the programmable timer can be
selected.
Writing to the interrupt mask registers can be done only in the DI
status (interrupt flag = "0").
At initial reset, this register is set to "0".