Specifications
Table Of Contents
- Technical Hardware
- 1 OVERVIEW
- 2 POWER SUPPLY AND INITIAL RESET
- 3 CPU, ROM, RAM
- 4 PERIPHERAL CIRCUITS AND OPERATION
- 4.1 Memory Map
- 4.2 Resetting Watchdog Timer
- 4.3 Oscillation Circuit
- 4.4 Input Ports (K00–K03, K10)
- 4.5 Output Ports (R00–R03)
- 4.6 I/O Ports (P00–P03, P10–P13, P20–P23)
- 4.7 LCD Driver (COM0–COM3, SEG0–SEG31)
- 4.8 Clock Timer
- 4.9 Stopwatch Timer
- 4.10 Programmable Timer
- 4.11 Serial Interface (SIN, SOUT, SCLK, SRDY)
- 4.12 A/D Converter
- 4.13 General-purpose Operation Amplifier (AMP)
- 4.14 SVD (Supply Voltage Detection) Circuit
- 4.15 Interrupt and HALT/SLEEP
- 5 SUMMARY OF NOTES
- 6 DIAGRAM OF BASIC EXTERNAL CONNECTIONS
- 7 CHARACTERISTICS
- 8 PACKAGE
- 9 PAD LAYOUT
- Technical Software
- 1 INTRODUCTION
- 2 BLOCK DIAGRAM
- 3 PROGRAM MEMORY (ROM)
- 4 DATA MEMORY
- 5 INITIAL RESET
- 6 PERIPHERAL CIRCUITS
- 6.1 Watchdog Timer
- 6.2 OSC3
- 6.3 Input Ports (K00–K03 and K10)
- 6.4 Output Ports (R00–R03)
- 6.5 I/O Ports (P00–P03, P10–P13 and P20–P23)
- 6.6 LCD Driver
- 6.7 Clock Timer
- 6.8 Stopwatch Timer
- 6.9 Programmable Timer
- 6.10 Serial Interface Circuit
- 6.11 Amplifier
- 6.12 SVD (Supply Voltage Detection) Circuit
- 6.13 A/D Converter
- 6.14 Sleep
- 6.15 Interrupt
- 7 SUMMARY OF NOTES
- APPENDIX
S1C62740 TECHNICAL HARDWARE EPSON I-59
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Stopwatch Timer)
Table 4.9.1 list the stopwatch timer control bits and their ad-
dresses.
Control of stopwatch
timer
Table 4.9.1 Control bits of stopwatch timer
*1 Initial value at the time of initial reset *5 Constantly "0" when being read
*2 Not set in the circuit *6 Refer to main manual
*3 Undefined *7 Page switching in I/O memory is not necessary
*4 Reset (0) immediately after being read
Note: Be sure to data reading in the order of low-order data (SWL0–SWL3) then
high-order data (SWH0–SWH3).
SWL0–SWL3:
Stopwatch timer 1/100 sec
(E7H)
Data (BCD) of the 1/100 sec column of the stopwatch timer can be
read out. These four bits are read-only, and cannot be used for
writing operations.
At initial reset, the timer data is set to "0H".
SWH0–SWH3:
Stopwatch timer 1/10 sec
(E8H)
Data (BCD) of the 1/10 sec column of the stopwatch timer can be
read out. These four bits are read-only, and cannot be used for
writing operations.
At initial reset, the timer data is set to "0H".
Address
Comment
Register
D3 D2 D1 D0 Name Init 1 0
*1
C5H
ISW0
R
0
0
ISW1
ISW0
–
–
0
0
Yes
Yes
No
No
ISW100
*2
*2
*5
*5
*4
*4
*7
CBH
EISW0
R/W
0
0
EISW1
EISW0
–
–
0
0
Enable
Enable
Mask
Mask
EISW10
*2
*2
*5
*5
Unused
Unused
Interrupt mask register (stopwatch 1 Hz)
Interrupt mask register (stopwatch 10 Hz)
Unused
Unused
Interrupt factor flag (stopwatch 1 Hz)
Interrupt factor flag (stopwatch 10 Hz)
0
R
E6H
SWRST
R
0
0
SWRUN
SWRST
–
–
0
Reset
Run
Reset
Stop
–
SWRUN
00
*2
*2
*5
*5
*5
E7H
SWL0
SWL3
SWL2
SWL1
SWL0
0
0
0
0
SWL1SWL2SWL3
E8H
SWH0
SWH3
SWH2
SWH1
SWH0
0
0
0
0
SWH1SWH2SWH3
R
Unused
Unused
Stopwatch timer Run/Stop
Stopwatch timer reset
R/W
R
Stopwatch timer data 1/10 sec (BCD)
MSB
LSB
W
Stopwatch timer data 1/100 sec (BCD)
MSB
LSB