Specifications
Table Of Contents
- Technical Hardware
- 1 OVERVIEW
- 2 POWER SUPPLY AND INITIAL RESET
- 3 CPU, ROM, RAM
- 4 PERIPHERAL CIRCUITS AND OPERATION
- 4.1 Memory Map
- 4.2 Resetting Watchdog Timer
- 4.3 Oscillation Circuit
- 4.4 Input Ports (K00–K03, K10)
- 4.5 Output Ports (R00–R03)
- 4.6 I/O Ports (P00–P03, P10–P13, P20–P23)
- 4.7 LCD Driver (COM0–COM3, SEG0–SEG31)
- 4.8 Clock Timer
- 4.9 Stopwatch Timer
- 4.10 Programmable Timer
- 4.11 Serial Interface (SIN, SOUT, SCLK, SRDY)
- 4.12 A/D Converter
- 4.13 General-purpose Operation Amplifier (AMP)
- 4.14 SVD (Supply Voltage Detection) Circuit
- 4.15 Interrupt and HALT/SLEEP
- 5 SUMMARY OF NOTES
- 6 DIAGRAM OF BASIC EXTERNAL CONNECTIONS
- 7 CHARACTERISTICS
- 8 PACKAGE
- 9 PAD LAYOUT
- Technical Software
- 1 INTRODUCTION
- 2 BLOCK DIAGRAM
- 3 PROGRAM MEMORY (ROM)
- 4 DATA MEMORY
- 5 INITIAL RESET
- 6 PERIPHERAL CIRCUITS
- 6.1 Watchdog Timer
- 6.2 OSC3
- 6.3 Input Ports (K00–K03 and K10)
- 6.4 Output Ports (R00–R03)
- 6.5 I/O Ports (P00–P03, P10–P13 and P20–P23)
- 6.6 LCD Driver
- 6.7 Clock Timer
- 6.8 Stopwatch Timer
- 6.9 Programmable Timer
- 6.10 Serial Interface Circuit
- 6.11 Amplifier
- 6.12 SVD (Supply Voltage Detection) Circuit
- 6.13 A/D Converter
- 6.14 Sleep
- 6.15 Interrupt
- 7 SUMMARY OF NOTES
- APPENDIX

S1C62740 TECHNICAL HARDWARE EPSON I-47
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (LCD Driver)
(1) Display ON/OFF control
In the S1C62740, ON/OFF of the LCD display can be controlled
by LCDON register.
At initial reset, LCDON is set to "0", and the LCD display is set
to the OFF status. In this time, the COM terminal and the SEG
terminal goes to V
C1 level.
To set the LCD display ON, write "1" to register LCDON.
(2) Switching of drive duty
By settings of registers LDTY0 and LDTY1, the LCD drive duty
can be selected from among 4 types, 1/4, 1/3, 1/2, 1/1 duty.
Table 4.7.1 shows the LCD drive duty setting.
LCD display ON/OFF
control and duty
switching
Table 4.7.1
LCD drive duty setting
Terminals used Maximum number
in common of segments
0 0 1/4 COM0–COM3 128 (32 × 4) fOSC1/1,024 (32 Hz)
0 1 1/3 COM0–COM2 96 (32 × 3) f
OSC1/768 (42.7 Hz)
1 0 1/2 COM0, COM1 64 (32 × 2) f
OSC1/1,024 (32 Hz)
1 1 1/1 COM0 32 (32 × 1) f
OSC1/1,024 (32 Hz)
* In case of f
OSC1 = 32,768 Hz
LDTY1 LDTY0 Duty Frame frequency
Basically you should select the drive duty with the smallest
drive segment number (for example, 1/3 duty for 80 segments
and 1/2 duty for 40 segments) from among the drive duties
permitting driving of the segment number of the LCD panel.
(3) Cadence adjustment of oscillation frequency
By using the 1/1 duty drive waveform, it enables easy adjust-
ment (cadence adjustment) of the oscillation frequency of the
OSC1 oscillation circuit (crystal oscillation circuit).
Note: For cadence adjustment, set the segment data so that all the LCDs light.
Figure 4.7.4 shows the drive waveform for 1/1 duty.
Fig. 4.7.4
Drive waveform for 1/1 duty
*
COM0
COM1
COM2
COM3
V
V
V
V
C3
C2
C1
SS
V
V
V
V
C3
C2
C1
SS
SEG0
–SEG31
Frame frequency
Not lit
Lit
LCD lighting status
COM0
SEG0–31