Specifications
Table Of Contents
- Technical Hardware
- 1 OVERVIEW
- 2 POWER SUPPLY AND INITIAL RESET
- 3 CPU, ROM, RAM
- 4 PERIPHERAL CIRCUITS AND OPERATION
- 4.1 Memory Map
- 4.2 Resetting Watchdog Timer
- 4.3 Oscillation Circuit
- 4.4 Input Ports (K00–K03, K10)
- 4.5 Output Ports (R00–R03)
- 4.6 I/O Ports (P00–P03, P10–P13, P20–P23)
- 4.7 LCD Driver (COM0–COM3, SEG0–SEG31)
- 4.8 Clock Timer
- 4.9 Stopwatch Timer
- 4.10 Programmable Timer
- 4.11 Serial Interface (SIN, SOUT, SCLK, SRDY)
- 4.12 A/D Converter
- 4.13 General-purpose Operation Amplifier (AMP)
- 4.14 SVD (Supply Voltage Detection) Circuit
- 4.15 Interrupt and HALT/SLEEP
- 5 SUMMARY OF NOTES
- 6 DIAGRAM OF BASIC EXTERNAL CONNECTIONS
- 7 CHARACTERISTICS
- 8 PACKAGE
- 9 PAD LAYOUT
- Technical Software
- 1 INTRODUCTION
- 2 BLOCK DIAGRAM
- 3 PROGRAM MEMORY (ROM)
- 4 DATA MEMORY
- 5 INITIAL RESET
- 6 PERIPHERAL CIRCUITS
- 6.1 Watchdog Timer
- 6.2 OSC3
- 6.3 Input Ports (K00–K03 and K10)
- 6.4 Output Ports (R00–R03)
- 6.5 I/O Ports (P00–P03, P10–P13 and P20–P23)
- 6.6 LCD Driver
- 6.7 Clock Timer
- 6.8 Stopwatch Timer
- 6.9 Programmable Timer
- 6.10 Serial Interface Circuit
- 6.11 Amplifier
- 6.12 SVD (Supply Voltage Detection) Circuit
- 6.13 A/D Converter
- 6.14 Sleep
- 6.15 Interrupt
- 7 SUMMARY OF NOTES
- APPENDIX
S1C62740 TECHNICAL HARDWARE EPSON I-43
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (I/O Ports)
PUP0, PUP1, PUP2:
Pull up control register
(D7H•D0–D2)
The pull up during the input mode can be set with these registers.
When "1" is written: Pull up ON
When "0" is written: Pull up OFF
Reading: Valid
The built-in pull up resistor which is turned ON during input mode
is set to enable in units of four bits. PUP0, PUP1 and PUP2 set the
pull up for P00–P03, P10–P13 and P20–P23, respectively.
By writing "1" to the pull up control register, the corresponding I/O
ports are pulled up (during input mode), while writing "0" turns the
pull up function OFF.
At initial reset, these registers are set to "0", so the pull up function
is set to OFF.
When P20–P23 have been set to input/output ports of the serial
interface, the terminal controlled by PUP2 differs from the case of
the I/O ports. (See Section 4.11, "Serial Interface".)
Programming note
When in the input mode, I/O ports are changed from low to high
by pull up resistor, the rise of the waveform is delayed on account
of the time constant of the pull up resistor and input gate capaci-
tance. Hence, when fetching input ports, set an appropriate wait
time.
Particular care needs to be taken of the key scan during key matrix
configuration.
Make this waiting time the amount of time or more calculated by
the following expression.
10 x C x R
C: terminal capacitance 5 pF + parasitic capacitance ? pF
R: pull up registance 300 kΩ