Specifications
Table Of Contents
- Technical Hardware
- 1 OVERVIEW
- 2 POWER SUPPLY AND INITIAL RESET
- 3 CPU, ROM, RAM
- 4 PERIPHERAL CIRCUITS AND OPERATION
- 4.1 Memory Map
- 4.2 Resetting Watchdog Timer
- 4.3 Oscillation Circuit
- 4.4 Input Ports (K00–K03, K10)
- 4.5 Output Ports (R00–R03)
- 4.6 I/O Ports (P00–P03, P10–P13, P20–P23)
- 4.7 LCD Driver (COM0–COM3, SEG0–SEG31)
- 4.8 Clock Timer
- 4.9 Stopwatch Timer
- 4.10 Programmable Timer
- 4.11 Serial Interface (SIN, SOUT, SCLK, SRDY)
- 4.12 A/D Converter
- 4.13 General-purpose Operation Amplifier (AMP)
- 4.14 SVD (Supply Voltage Detection) Circuit
- 4.15 Interrupt and HALT/SLEEP
- 5 SUMMARY OF NOTES
- 6 DIAGRAM OF BASIC EXTERNAL CONNECTIONS
- 7 CHARACTERISTICS
- 8 PACKAGE
- 9 PAD LAYOUT
- Technical Software
- 1 INTRODUCTION
- 2 BLOCK DIAGRAM
- 3 PROGRAM MEMORY (ROM)
- 4 DATA MEMORY
- 5 INITIAL RESET
- 6 PERIPHERAL CIRCUITS
- 6.1 Watchdog Timer
- 6.2 OSC3
- 6.3 Input Ports (K00–K03 and K10)
- 6.4 Output Ports (R00–R03)
- 6.5 I/O Ports (P00–P03, P10–P13 and P20–P23)
- 6.6 LCD Driver
- 6.7 Clock Timer
- 6.8 Stopwatch Timer
- 6.9 Programmable Timer
- 6.10 Serial Interface Circuit
- 6.11 Amplifier
- 6.12 SVD (Supply Voltage Detection) Circuit
- 6.13 A/D Converter
- 6.14 Sleep
- 6.15 Interrupt
- 7 SUMMARY OF NOTES
- APPENDIX
S1C62740 TECHNICAL HARDWARE EPSON I-41
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (I/O Ports)
Control of I/O ports
Table 4.6.1 lists the I/O ports' control bits and their addresses.
Table 4.6.1 Control bits of I/O ports
I/O port data can be read and output data can be set through
these ports.
• When writing data
When "1" is written: High level
When "0" is written: Low level
When an I/O port is set to the output mode, the written data is
output unchanged from the I/O port terminal. When "1" is written
as the port data, the port terminal goes high (V
DD), and when "0" is
written, the level goes low (V
SS).
Port data can be written also in the input mode.
• When reading data out
When "1" is read: High level
When "0" is read: Low level
The terminal voltage level of the I/O port is read out. When the I/O
port is in the input mode the voltage level being input to the port
terminal can be read out; in the output mode the register value can
be read. When the terminal voltage is high (V
DD) the port data that
can be read is "1", and when the terminal voltage is low (V
SS) the
data is "0".
P00–P03, P10–P13, P20–P23:
I/O port data
(D8H, D9H, DAH)
*1 Initial value at the time of initial reset *5 Constantly "0" when being read
*2 Not set in the circuit *6 Refer to main manual
*3 Undefined *7 Page switching in I/O memory is not necessary
*4 Reset (0) immediately after being read
Address
Comment
Register
D3 D2 D1 D0 Name Init 1 0
*1
D6H
IOC0
R
0
IOC2
IOC1
IOC0
–
0
0
0
Output
Output
Output
Input
Input
Input
IOC1IOC20
*2
*6
D7H
PUP0
R/W
0
PUP2
PUP1
PUP0
–
0
0
0
Unused
Pull up control register 2 (P20–P23)
Pull up control register 1 (P10–P13)
Pull up control register 0 (P00–P03)
On
On
On
Off
Off
Off
PUP1PUP20
*2
*6
D8H
P00
P03
P02
P01
P00
–
–
–
–
High
High
High
High
Low
Low
Low
Low
P01P02P03
*2
*2
*2
*2
D9H
P10
P13
P12
P11
P10
–
–
–
–
High
High
High
High
Low
Low
Low
Low
P11P12P13
*2
*2
*2
*2
DAH
P20
P23
P22
P21
P20
–
–
–
–
High
High
High
High
Low
Low
Low
Low
P21P22P23
*2
*2
*2
*2
R/W
*7
R/W
R/W
Unused
I/O control register 2 (P20–P23)
I/O control register 1 (P10–P13)
I/O control register 0 (P00–P03)
R/W
R
I/O port (P00–P03)
I/O port (P10–P13)
I/O port (P20–P23)
When P20–P23 is selected as SIO port, P20–
P23 registers will function as register only
*5
*5