Specifications

I-14 EPSON S1C62740 TECHNICAL HARDWARE
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Memory Map)
PERIPHERAL CIRCUITS AND
OPERATION
Peripheral circuits (timer, I/O, and so on) of the S1C62740 are
memory mapped, and interfaced with the CPU. Thus, all the
peripheral circuits can be controlled by using the memory opera-
tion command to access the I/O memory in the memory map.
The following sections describe how the peripheral circuits opera-
tion.
CHAPTER 4
4.1 Memory Map
Data memory of the S1C62740 has an address space of 600 words,
of which 32 words are allocated to display memory and 56 words to
I/O memory.
Figure 4.1.1 present the overall memory maps of the S1C62740,
and Tables 4.1.1(a)–(d) the peripheral circuits' (I/O space) memory
maps.
In the S1C62740 the same I/O memory has been laid out for each
page C0H–FFH and the same display memory for 80H–9FH. As a
result, the I/O memory and display memory can be accessed
without changing over the data memory page. The same result is
obtained for I/O memory and display memory changes and for
readable/writable address references, no matter on what page it is
done.
Note: Memory is not mounted in unused area within the memory map and in
memory area not indicated in this chapter. For this reason, normal opera-
tion cannot be assured for programs that have been prepared with access
to these area.