Specifications
Table Of Contents
- Technical Hardware
- 1 OVERVIEW
- 2 POWER SUPPLY AND INITIAL RESET
- 3 CPU, ROM, RAM
- 4 PERIPHERAL CIRCUITS AND OPERATION
- 4.1 Memory Map
- 4.2 Resetting Watchdog Timer
- 4.3 Oscillation Circuit
- 4.4 Input Ports (K00–K03, K10)
- 4.5 Output Ports (R00–R03)
- 4.6 I/O Ports (P00–P03, P10–P13, P20–P23)
- 4.7 LCD Driver (COM0–COM3, SEG0–SEG31)
- 4.8 Clock Timer
- 4.9 Stopwatch Timer
- 4.10 Programmable Timer
- 4.11 Serial Interface (SIN, SOUT, SCLK, SRDY)
- 4.12 A/D Converter
- 4.13 General-purpose Operation Amplifier (AMP)
- 4.14 SVD (Supply Voltage Detection) Circuit
- 4.15 Interrupt and HALT/SLEEP
- 5 SUMMARY OF NOTES
- 6 DIAGRAM OF BASIC EXTERNAL CONNECTIONS
- 7 CHARACTERISTICS
- 8 PACKAGE
- 9 PAD LAYOUT
- Technical Software
- 1 INTRODUCTION
- 2 BLOCK DIAGRAM
- 3 PROGRAM MEMORY (ROM)
- 4 DATA MEMORY
- 5 INITIAL RESET
- 6 PERIPHERAL CIRCUITS
- 6.1 Watchdog Timer
- 6.2 OSC3
- 6.3 Input Ports (K00–K03 and K10)
- 6.4 Output Ports (R00–R03)
- 6.5 I/O Ports (P00–P03, P10–P13 and P20–P23)
- 6.6 LCD Driver
- 6.7 Clock Timer
- 6.8 Stopwatch Timer
- 6.9 Programmable Timer
- 6.10 Serial Interface Circuit
- 6.11 Amplifier
- 6.12 SVD (Supply Voltage Detection) Circuit
- 6.13 A/D Converter
- 6.14 Sleep
- 6.15 Interrupt
- 7 SUMMARY OF NOTES
- APPENDIX

II-92 EPSON S1C62740 TECHNICAL SOFTWARE
APPENDIX C: PSEUDO-INSTRUCTION TABLE OF THE CROSS ASSEMBLER
APPENDIX C PSEUDO-INSTRUCTION TABLE OF THE CROSS
ASSEMBLER
Item No. Pseudo-instruction Meaning Example of Use
1
2
3
4
5
6
7
8
9
10
EQU
(Equation)
ORG
(Origin)
SET
(Set)
DW
(Define Word)
PAGE
(Page)
SECTION
(Section)
END
(End)
MACRO
(Macro)
LOCAL
(Local)
ENDM
(End Macro)
To allocate data to label
To define location counter
To allocate data to label
(data can be changed)
To define ROM data
To define boundary of page
To define boundary of section
To terminate assembly
To define macro
To make local specification of label
during macro definition
To end macro definition
ABC EQU 9
CHECK MACRO DATA
LOCAL LOOP
LOOP CP MX,DATA
JP NZ,LOOP
ENDM
CHECK 1
BCD EQU ABC+1
ORG 100H
ORG 256
ABC SET 0001H
ABC SET 0002H
ABC DW 'AB'
BCD DW 0FFBH
PAGE 1H
PAGE 15
SECTION
END