Specifications

S1C62740 TECHNICAL SOFTWARE EPSON II-87
APPENDIX B: S1C62740 INSTRUCTION SET
APPENDIX B S1C62740 INSTRUCTION SET
Instruction set - 1
B
1
0
0
0
0
0
1
0
0
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
A
1
0
0
0
1
1
1
1
1
1
1
0
1
1
1
1
1
1
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
9
1
0
1
1
1
1
1
0
0
1
1
0
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
8
0
0
0
1
0
1
1
0
1
1
1
1
1
1
1
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
0
s7
s7
s7
s7
s7
1
s7
s7
1
1
7
1
1
1
1
1
1
x7
y7
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
6
1
s6
s6
s6
s6
s6
1
s6
s6
1
1
6
1
1
1
1
1
1
x6
y6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
5
0
s5
s5
s5
s5
s5
1
s5
s5
0
0
5
1
1
1
1
1
1
x5
y5
0
0
0
0
0
0
1
1
1
1
1
1
0
0
1
1
4
p4
s4
s4
s4
s4
s4
0
s4
s4
1
1
4
1
1
1
1
0
1
x4
y4
0
0
0
1
1
1
0
0
0
1
1
1
0
1
0
1
3
p3
s3
s3
s3
s3
s3
1
s3
s3
1
1
3
1
1
1
1
0
0
x3
y3
0
0
1
0
0
1
0
0
1
0
0
1
i3
i3
i3
i3
2
p2
s2
s2
s2
s2
s2
0
s2
s2
1
1
2
0
1
0
0
0
0
x2
y2
0
1
0
0
1
0
0
1
0
0
1
0
i2
i2
i2
i2
1
p1
s1
s1
s1
s1
s1
0
s1
s1
1
1
1
1
1
0
0
0
0
x1
y1
r1
r1
r1
r1
r1
r1
r1
r1
r1
r1
r1
r1
i1
i1
i1
i1
0
p0
s0
s0
s0
s0
s0
0
s0
s0
1
0
0
1
1
0
1
0
0
x0
y0
r0
r0
r0
r0
r0
r0
r0
r0
r0
r0
r0
r0
i0
i0
i0
i0
p
s
C, s
NC, s
Z, s
NZ, s
s
s
X
Y
X, x
Y, y
XP, r
XH, r
XL, r
YP, r
YH, r
YL, r
r, XP
r, XH
r, XL
r, YP
r, YH
r, YL
XH, i
XL, i
YH, i
YL, i
PSET
JP
JPBA
CALL
CALZ
RET
RETS
RETD
NOP5
NOP7
HALT
SLP
INC
LD
ADC
IDZC
↑
↑
↑
↑
↑
↑
↑
↑
5
5
5
5
5
5
5
7
7
7
12
12
5
7
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
7
7
7
7
NBP p4, NPP p3~p0
PCB NBP, PCP NPP, PCS s7~s0
PCB NBP, PCP NPP, PCS s7~s0 if C=1
PCB NBP, PCP NPP, PCS s7~s0 if C=0
PCB NBP, PCP NPP, PCS s7~s0 if Z=1
PCB NBP, PCP NPP, PCS s7~s0 if Z=0
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
PCB NBP, PCP NPP, PCSH B, PCSL A
M(SP-1) PCP, M(SP-2) PCSH, M(SP-3) PCSL+1
SP SP-3, PCP NPP, PCS s7~s0
M(SP-1) PCP, M(SP-2) PCSH, M(SP-3) PCSL+1
SP SP-3, PCP 0, PCS s7~s0
PCSL M(SP), PCSH M(SP+1), PCP M(SP+2)
SP SP+3
PCSL M(SP), PCSH M(SP+1), PCP M(SP+2)
SP SP+3, PC PC+1
PCSL M(SP), PCSH M(SP+1), PCP M(SP+2)
SP SP+3, M(X) 3~ 0, M(X+1) 7~ 4, X X+2
No operation (5 clock cycles)
No operation (7 clock cycles)
Halt (stop clock)
SLEEP (stop oscillation)
X X+1
Y Y+1
XH x7~x4, XL x3~x0
YH y7~y4, YL y3~y0
XP
XH
XL
YP
YH
YL
r XP
r XH
r XL
r YP
r YH
r YL
XH
XL
YH
YL
←←
←←←
←←←
←←←
←←←
←←←
←
←← ←
←←
←← ←
←←←←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
r
r
r
r
r
r
XH+i3~i0+C
XL+i3~i0+C
YH+i3~i0+C
YL+i3~i0+C
↓
↓
↓
↓
↓
↓
↓
↓
l llllllll
ll ll
Branch
instructions
System
control
instructions
Index
operation
instructions
Classification Operand Clock
Operation Code Flag
Mne-
monic
Operation