Specifications
Table Of Contents
- Technical Hardware
- 1 OVERVIEW
- 2 POWER SUPPLY AND INITIAL RESET
- 3 CPU, ROM, RAM
- 4 PERIPHERAL CIRCUITS AND OPERATION
- 4.1 Memory Map
- 4.2 Resetting Watchdog Timer
- 4.3 Oscillation Circuit
- 4.4 Input Ports (K00–K03, K10)
- 4.5 Output Ports (R00–R03)
- 4.6 I/O Ports (P00–P03, P10–P13, P20–P23)
- 4.7 LCD Driver (COM0–COM3, SEG0–SEG31)
- 4.8 Clock Timer
- 4.9 Stopwatch Timer
- 4.10 Programmable Timer
- 4.11 Serial Interface (SIN, SOUT, SCLK, SRDY)
- 4.12 A/D Converter
- 4.13 General-purpose Operation Amplifier (AMP)
- 4.14 SVD (Supply Voltage Detection) Circuit
- 4.15 Interrupt and HALT/SLEEP
- 5 SUMMARY OF NOTES
- 6 DIAGRAM OF BASIC EXTERNAL CONNECTIONS
- 7 CHARACTERISTICS
- 8 PACKAGE
- 9 PAD LAYOUT
- Technical Software
- 1 INTRODUCTION
- 2 BLOCK DIAGRAM
- 3 PROGRAM MEMORY (ROM)
- 4 DATA MEMORY
- 5 INITIAL RESET
- 6 PERIPHERAL CIRCUITS
- 6.1 Watchdog Timer
- 6.2 OSC3
- 6.3 Input Ports (K00–K03 and K10)
- 6.4 Output Ports (R00–R03)
- 6.5 I/O Ports (P00–P03, P10–P13 and P20–P23)
- 6.6 LCD Driver
- 6.7 Clock Timer
- 6.8 Stopwatch Timer
- 6.9 Programmable Timer
- 6.10 Serial Interface Circuit
- 6.11 Amplifier
- 6.12 SVD (Supply Voltage Detection) Circuit
- 6.13 A/D Converter
- 6.14 Sleep
- 6.15 Interrupt
- 7 SUMMARY OF NOTES
- APPENDIX
S1C62740 TECHNICAL HARDWARE EPSON I-11
CHAPTER 2: POWER SUPPLY AND INITIAL RESET
If you use this function, make sure that the specified ports do not
go low at the same time during ordinary operation.
Furthermore, do not perform an initial reset when turning the
power on by this function.
Watchdog timer
If the CPU runs away for some reason, the watchdog timer will
detect this situation and output an initial reset signal. See Section
4.2, "Resetting Watchdog Timer" for details.
Furthermore, do not perform an initial reset when turning the
power on by this function.
Internal register at
initial resetting
Initial reset initializes the CPU as shown in the table below.
Table 2.2.2
Initial values
CPU Core
8
4
4
8
10
10
4
4
4
1
1
1
1
Program counter step
Program counter page
New page pointer
Stack pointer
Index register IX
Index register IY
Rejister pointer
General-purpose register A
General-purpose register B
Interrupt flag
Decimal flag
Zero flag
Carry flag
00H
1H
1H
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
0
0
Undefined
Undefined
Name
Number of bits
Setting value
Peripheral circuits
4
4
–
RAM
Display memory
Other peripheral circuit
Undefined
Undefined
*1
Name Number of bits
Setting value
PCS
PCP
NPP
SP
IX
IY
RP
A
B
I
D
Z
C
Symbol
*2
*1 See Section 4.1, "Memory Map".
*2 Bits corresponding to COM0 is set to 1.
2.3 Test Terminals (TEST and CO)
This is the terminal that is used at the time of the factory inspec-
tion of the IC. During normal operation, connect the TEST to V
DD
and make the CO an N.C. (no connection).