Specifications
Table Of Contents
- Technical Hardware
- 1 OVERVIEW
- 2 POWER SUPPLY AND INITIAL RESET
- 3 CPU, ROM, RAM
- 4 PERIPHERAL CIRCUITS AND OPERATION
- 4.1 Memory Map
- 4.2 Resetting Watchdog Timer
- 4.3 Oscillation Circuit
- 4.4 Input Ports (K00–K03, K10)
- 4.5 Output Ports (R00–R03)
- 4.6 I/O Ports (P00–P03, P10–P13, P20–P23)
- 4.7 LCD Driver (COM0–COM3, SEG0–SEG31)
- 4.8 Clock Timer
- 4.9 Stopwatch Timer
- 4.10 Programmable Timer
- 4.11 Serial Interface (SIN, SOUT, SCLK, SRDY)
- 4.12 A/D Converter
- 4.13 General-purpose Operation Amplifier (AMP)
- 4.14 SVD (Supply Voltage Detection) Circuit
- 4.15 Interrupt and HALT/SLEEP
- 5 SUMMARY OF NOTES
- 6 DIAGRAM OF BASIC EXTERNAL CONNECTIONS
- 7 CHARACTERISTICS
- 8 PACKAGE
- 9 PAD LAYOUT
- Technical Software
- 1 INTRODUCTION
- 2 BLOCK DIAGRAM
- 3 PROGRAM MEMORY (ROM)
- 4 DATA MEMORY
- 5 INITIAL RESET
- 6 PERIPHERAL CIRCUITS
- 6.1 Watchdog Timer
- 6.2 OSC3
- 6.3 Input Ports (K00–K03 and K10)
- 6.4 Output Ports (R00–R03)
- 6.5 I/O Ports (P00–P03, P10–P13 and P20–P23)
- 6.6 LCD Driver
- 6.7 Clock Timer
- 6.8 Stopwatch Timer
- 6.9 Programmable Timer
- 6.10 Serial Interface Circuit
- 6.11 Amplifier
- 6.12 SVD (Supply Voltage Detection) Circuit
- 6.13 A/D Converter
- 6.14 Sleep
- 6.15 Interrupt
- 7 SUMMARY OF NOTES
- APPENDIX
II-60 EPSON S1C62740 TECHNICAL SOFTWARE
CHAPTER 6: PERIPHERAL CIRCUITS (A/D Converter)
Feature of the A/D
converter
The S1C62740 has a built-in A/D converter with following charac-
teristics:
(1) Using dual-slope conversion method
(2) Conversion time and resolution can change by software
(3) Can measurement different voltage between two inputs, or
between one input and GND
(4) Can measurement resistor between two inputs
(5) Can generate GND signal internally, also GND signal can be
support by external circuit
(6) A/D converter reference voltage can be generated internally, or
support by external
(7) Automatic detect the polarity and with 13 bits A/D converter
Control of the A/D
converter
Control the GND signal
GND signal is controlled by GND1 and GND0 (F0H•D3, D2).
Reference voltage (VR) control
Reference voltage (VR) is controlled by VRAON and VRON (F0H•D1,
D0)
• VRON = "1": VR reference voltage is generated internally
VRON = "0": VR reference voltage is generated externally
• VRAON = "1": VR output voltage adjustment ON
VRAON = "0": VR output voltage adjustment OFF
Resolution/conversion time
It is controlled by ADRS1 and ADRS0 (F3H•D1, D0).
GND1 GND0 Drivability
0 0 OFF (support by external)
0 1 ON (×1)
1 0 ON (×2)
1 1 ON (×4)
Table 6.13.2
GND signal selection
Table 6.13.3
Resolution/conversion time
selection
ADRS1 ADRS0 Resolution/conversion time
0 0 6,552 counts / 500 msec
0 1 3,276 counts / 250 msec
1 0 1,638 counts / 125 msec
1 1 820 counts / 62.5 msec