Specifications
Table Of Contents
- Technical Hardware
- 1 OVERVIEW
- 2 POWER SUPPLY AND INITIAL RESET
- 3 CPU, ROM, RAM
- 4 PERIPHERAL CIRCUITS AND OPERATION
- 4.1 Memory Map
- 4.2 Resetting Watchdog Timer
- 4.3 Oscillation Circuit
- 4.4 Input Ports (K00–K03, K10)
- 4.5 Output Ports (R00–R03)
- 4.6 I/O Ports (P00–P03, P10–P13, P20–P23)
- 4.7 LCD Driver (COM0–COM3, SEG0–SEG31)
- 4.8 Clock Timer
- 4.9 Stopwatch Timer
- 4.10 Programmable Timer
- 4.11 Serial Interface (SIN, SOUT, SCLK, SRDY)
- 4.12 A/D Converter
- 4.13 General-purpose Operation Amplifier (AMP)
- 4.14 SVD (Supply Voltage Detection) Circuit
- 4.15 Interrupt and HALT/SLEEP
- 5 SUMMARY OF NOTES
- 6 DIAGRAM OF BASIC EXTERNAL CONNECTIONS
- 7 CHARACTERISTICS
- 8 PACKAGE
- 9 PAD LAYOUT
- Technical Software
- 1 INTRODUCTION
- 2 BLOCK DIAGRAM
- 3 PROGRAM MEMORY (ROM)
- 4 DATA MEMORY
- 5 INITIAL RESET
- 6 PERIPHERAL CIRCUITS
- 6.1 Watchdog Timer
- 6.2 OSC3
- 6.3 Input Ports (K00–K03 and K10)
- 6.4 Output Ports (R00–R03)
- 6.5 I/O Ports (P00–P03, P10–P13 and P20–P23)
- 6.6 LCD Driver
- 6.7 Clock Timer
- 6.8 Stopwatch Timer
- 6.9 Programmable Timer
- 6.10 Serial Interface Circuit
- 6.11 Amplifier
- 6.12 SVD (Supply Voltage Detection) Circuit
- 6.13 A/D Converter
- 6.14 Sleep
- 6.15 Interrupt
- 7 SUMMARY OF NOTES
- APPENDIX
S1C62740 TECHNICAL SOFTWARE EPSON II-55
CHAPTER 6: PERIPHERAL CIRCUITS (Amplifier)
Amplifier6.11
I/O data memory of
the amplifier circuit
The control registers of the amplifier circuit are shown in Table
6.11.1.
Table 6.11.1 Control registers of clock timer
*1 Initial value at the time of initial reset *5 Constantly "0" when being read
*2 Not set in the circuit *6 Refer to main manual
*3 Undefined *7 Page switching in I/O memory is not necessary
*4 Reset (0) immediately after being read
Control of the
amplifier circuit
There are two amplifiers (AMP1 and AMP0) build in the S1C62740
chip.
It can be performed as a comparator or amplifier depend on the
application usages.
These circuits can be turned on and off to save power. The bit
AMPON1 (AMPON0) controls the amplifier AMP1 (AMP0) power on/
off.
At initial reset, the AMP1 and AMP0 are off while these circuit is
not in use, keep these bits set to "0" to save power.
The output data of the amplifier appears on the chip's PAD and the
internal register AMPDT1 for AMP1, AMPDT0 for AMP0.
(1) When AMPP0 > AMPM0, AMPDT0 will be set to "1".
When AMPP0 < AMPM0, AMPDT0 will be set to "0".
(2) When AMPP1 > AMPM1, AMPDT1 will be set to "1".
When AMPP1 < AMPM1, AMPDT1 will be set to "0".
Address
Comment
Register
D3 D2 D1 D0 Name Init 1 0
*1
F1H
AMPON0
R/W
0
0
AMPON1
AMPON0
–
–
0
0
On
On
On
On
AMPON100
*2
*2
*5
*5
F2H
AMPDT0
0
0
AMPDT1
AMPDT0
High
High
Low
Low
AMPDT100
–
–
0
0
*2
*2
*5
*5
*7
Unused
Unused
AMP1 On/Off
AMP0 On/Off
Unused
Unused
AMP1 output data
AMP0 output data
R
R