Specifications
Table Of Contents
- Technical Hardware
- 1 OVERVIEW
- 2 POWER SUPPLY AND INITIAL RESET
- 3 CPU, ROM, RAM
- 4 PERIPHERAL CIRCUITS AND OPERATION
- 4.1 Memory Map
- 4.2 Resetting Watchdog Timer
- 4.3 Oscillation Circuit
- 4.4 Input Ports (K00–K03, K10)
- 4.5 Output Ports (R00–R03)
- 4.6 I/O Ports (P00–P03, P10–P13, P20–P23)
- 4.7 LCD Driver (COM0–COM3, SEG0–SEG31)
- 4.8 Clock Timer
- 4.9 Stopwatch Timer
- 4.10 Programmable Timer
- 4.11 Serial Interface (SIN, SOUT, SCLK, SRDY)
- 4.12 A/D Converter
- 4.13 General-purpose Operation Amplifier (AMP)
- 4.14 SVD (Supply Voltage Detection) Circuit
- 4.15 Interrupt and HALT/SLEEP
- 5 SUMMARY OF NOTES
- 6 DIAGRAM OF BASIC EXTERNAL CONNECTIONS
- 7 CHARACTERISTICS
- 8 PACKAGE
- 9 PAD LAYOUT
- Technical Software
- 1 INTRODUCTION
- 2 BLOCK DIAGRAM
- 3 PROGRAM MEMORY (ROM)
- 4 DATA MEMORY
- 5 INITIAL RESET
- 6 PERIPHERAL CIRCUITS
- 6.1 Watchdog Timer
- 6.2 OSC3
- 6.3 Input Ports (K00–K03 and K10)
- 6.4 Output Ports (R00–R03)
- 6.5 I/O Ports (P00–P03, P10–P13 and P20–P23)
- 6.6 LCD Driver
- 6.7 Clock Timer
- 6.8 Stopwatch Timer
- 6.9 Programmable Timer
- 6.10 Serial Interface Circuit
- 6.11 Amplifier
- 6.12 SVD (Supply Voltage Detection) Circuit
- 6.13 A/D Converter
- 6.14 Sleep
- 6.15 Interrupt
- 7 SUMMARY OF NOTES
- APPENDIX
II-34 EPSON S1C62740 TECHNICAL SOFTWARE
CHAPTER 6: PERIPHERAL CIRCUITS (LCD Driver)
Displaying 7-segment
The LCD display routine using the assignment of Figure 6.6.2 can
be programmed as follows.
Label Mnemonic/operand Comment
;*
;* LCD DRIVER
;*
;* SEVEN SEGMENT CHARACTER GENERATOR
;
ORG 000H
RETD 3FH ;0 IS DISPLAYED
RETD 06H ;1 IS DISPLAYED
RETD 5BH ;2 IS DISPLAYED
RETD 4FH ;3 IS DISPLAYED
RETD 66H ;4 IS DISPLAYED
RETD 6DH ;5 IS DISPLAYED
RETD 7DH ;6 IS DISPLAYED
RETD 07H ;7 IS DISPLAYED
RETD 7FH ;8 IS DISPLAYED
RETD 6FH ;9 IS DISPLAYED
;
SEVENS:
LD B,0 ;PREPARE B AS 0 FOR JUMP
LD X,090H ;SET LCD DISPLAY MEMORY ADDRESS
JPBA ;JUMP TO TABLE
;
When the above routine is called (by the CALL or CALZ instruction)
with any number from "0" to "9" set in the A register for the assign-
ment of Figure 6.6.3, seven segments are displayed according to
the contents of the A register.
Fig. 6.6.3
Data set in A register and
display patterns
The RETD instruction can be used to write data to the display
memory only if it is addressed using the X register. (Addressing
using the Y register is invalid.)
Note that the stack pointer must be set to a proper value before the
CALL (CALZ) instruction is executed.
0
1
DisplayA resister
2
3
DisplayA resister
4
5
DisplayA resister
6
7
DisplayA resister
8
9
DisplayA resister