Specifications

II-32 EPSON S1C62740 TECHNICAL SOFTWARE
CHAPTER 6: PERIPHERAL CIRCUITS (LCD Driver)
LCD Driver6.6
I/O data memory of
the LCD driver
The control registers of the LCD driver are shown in Table 6.6.1.
Table 6.6.1 Control registers of LCD driver
*1 Initial value at the time of initial reset *5 Constantly "0" when being read
*2 Not set in the circuit *6 Refer to main manual
*3 Undefined *7 Page switching in I/O memory is not necessary
*4 Reset (0) immediately after being read
Address
Page High
Low
0123456789ABCDEF
8
9
Display memory (32 words x 4 bits) W
0–3
Fig. 6.6.1 Display memory map
Control of the LCD
driver
The S1C62740 contains 128 bits of display memory in addresses
80H to 9FH of the data memory.
It's LCD common can be software programmable for 4 COM, 3
COM, 2 COM or 1 COM. So each display memory can be assigned
to any 128 bits (32 SEG × 4 COM), 96 bits (32 SEG × 3 COM), 64
bits (32 SEG × 2 COM), or 32 bits (32 SEG × 1 COM) of the 128 bits
for the LCD driver by using a segment mask option. The remaining
bits of display memory are not connected to the LCD driver, and
are not output even when data is written. An LCD segment is on
with "1" set in the display memory, and off with "0" set in the
display memory. The display memory cannot be read because it is
a write-only RAM.
• LCD drive duty selection is control by registers LDTY1 and
LDTY0 (EFH•D3, D2).
Table 6.6.2
LCD drive duty selection
LDTY1 LDTY0 LCD drive duty
0 0 1/4 (dynamic)
0 1 1/3 (dynamic)
1 0 1/2 (dynamic)
1 1 1/1 (dynamic)
Address
Comment
Register
D3 D2 D1 D0 Name Init 1 0
*1
*7
EFH
LCDON
R/W
LDTY1
LDTY0
0
LCDON
0
0
–
0
On Off
0
R
LDTY0LDTY1
*5
LCD drive duty selection
0: 1/4, 1: 1/3, 2: 1/2, 3: 1/1
Unused
LCD display control (LCD display all off)
*2
R/W