Specifications
Table Of Contents
- Technical Hardware
- 1 OVERVIEW
- 2 POWER SUPPLY AND INITIAL RESET
- 3 CPU, ROM, RAM
- 4 PERIPHERAL CIRCUITS AND OPERATION
- 4.1 Memory Map
- 4.2 Resetting Watchdog Timer
- 4.3 Oscillation Circuit
- 4.4 Input Ports (K00–K03, K10)
- 4.5 Output Ports (R00–R03)
- 4.6 I/O Ports (P00–P03, P10–P13, P20–P23)
- 4.7 LCD Driver (COM0–COM3, SEG0–SEG31)
- 4.8 Clock Timer
- 4.9 Stopwatch Timer
- 4.10 Programmable Timer
- 4.11 Serial Interface (SIN, SOUT, SCLK, SRDY)
- 4.12 A/D Converter
- 4.13 General-purpose Operation Amplifier (AMP)
- 4.14 SVD (Supply Voltage Detection) Circuit
- 4.15 Interrupt and HALT/SLEEP
- 5 SUMMARY OF NOTES
- 6 DIAGRAM OF BASIC EXTERNAL CONNECTIONS
- 7 CHARACTERISTICS
- 8 PACKAGE
- 9 PAD LAYOUT
- Technical Software
- 1 INTRODUCTION
- 2 BLOCK DIAGRAM
- 3 PROGRAM MEMORY (ROM)
- 4 DATA MEMORY
- 5 INITIAL RESET
- 6 PERIPHERAL CIRCUITS
- 6.1 Watchdog Timer
- 6.2 OSC3
- 6.3 Input Ports (K00–K03 and K10)
- 6.4 Output Ports (R00–R03)
- 6.5 I/O Ports (P00–P03, P10–P13 and P20–P23)
- 6.6 LCD Driver
- 6.7 Clock Timer
- 6.8 Stopwatch Timer
- 6.9 Programmable Timer
- 6.10 Serial Interface Circuit
- 6.11 Amplifier
- 6.12 SVD (Supply Voltage Detection) Circuit
- 6.13 A/D Converter
- 6.14 Sleep
- 6.15 Interrupt
- 7 SUMMARY OF NOTES
- APPENDIX
Software
S1C62740 TECHNICAL SOFTWARE EPSON II-iii
CONTENTS
6.14 Sleep ....................................................................................... II-65
I/O data memory of sleep function ..................................... II-65
Control of the sleep function .............................................. II-65
Example program for the sleep function ............................. II-66
Programming notes ............................................................ II-68
6.15 Interrupt ................................................................................... II-69
Interrupt vector, factor flag, and mask register ................... II-69
Example program for the interrupt ..................................... II-71
Programming notes ............................................................ II-75
CHAPTER 7 SUMMARY OF NOTES.....................................................II-76
7.1 Notes for Low Current Consumption ....................................... II-76
7.2 Summary of Notes by Function ............................................... II-77
APPENDIX A S1C62740 DATA MEMORY (RAM) MAP.......................................... II-82
APPENDIX B S1C62740 INSTRUCTION SET............................................................ II-87
APPENDIX C PSEUDO-INSTRUCTION TABLE OF THE CROSS ASSEMBLER............. II-92
APPENDIX D COMMAND TABLE OF ICE............................................................... II-93