Specifications
Table Of Contents
- Technical Hardware
- 1 OVERVIEW
- 2 POWER SUPPLY AND INITIAL RESET
- 3 CPU, ROM, RAM
- 4 PERIPHERAL CIRCUITS AND OPERATION
- 4.1 Memory Map
- 4.2 Resetting Watchdog Timer
- 4.3 Oscillation Circuit
- 4.4 Input Ports (K00–K03, K10)
- 4.5 Output Ports (R00–R03)
- 4.6 I/O Ports (P00–P03, P10–P13, P20–P23)
- 4.7 LCD Driver (COM0–COM3, SEG0–SEG31)
- 4.8 Clock Timer
- 4.9 Stopwatch Timer
- 4.10 Programmable Timer
- 4.11 Serial Interface (SIN, SOUT, SCLK, SRDY)
- 4.12 A/D Converter
- 4.13 General-purpose Operation Amplifier (AMP)
- 4.14 SVD (Supply Voltage Detection) Circuit
- 4.15 Interrupt and HALT/SLEEP
- 5 SUMMARY OF NOTES
- 6 DIAGRAM OF BASIC EXTERNAL CONNECTIONS
- 7 CHARACTERISTICS
- 8 PACKAGE
- 9 PAD LAYOUT
- Technical Software
- 1 INTRODUCTION
- 2 BLOCK DIAGRAM
- 3 PROGRAM MEMORY (ROM)
- 4 DATA MEMORY
- 5 INITIAL RESET
- 6 PERIPHERAL CIRCUITS
- 6.1 Watchdog Timer
- 6.2 OSC3
- 6.3 Input Ports (K00–K03 and K10)
- 6.4 Output Ports (R00–R03)
- 6.5 I/O Ports (P00–P03, P10–P13 and P20–P23)
- 6.6 LCD Driver
- 6.7 Clock Timer
- 6.8 Stopwatch Timer
- 6.9 Programmable Timer
- 6.10 Serial Interface Circuit
- 6.11 Amplifier
- 6.12 SVD (Supply Voltage Detection) Circuit
- 6.13 A/D Converter
- 6.14 Sleep
- 6.15 Interrupt
- 7 SUMMARY OF NOTES
- APPENDIX

S1C62740 TECHNICAL HARDWARE EPSON I-123
CHAPTER 7: ELECTRICAL CHARACTERISTICS
Analog Characteristics and Consumed Current
If no special requirement
VDD = VDDA = 3 V, VSS = VSSA = 0 V, fOSC1 = 32.768 kHz, CG = 25 pF, Ta = 25°C, VD1, VC1, VC2 and VC3 are internal
voltage, C1–C6 = 0.1 µF
7.4
Item
Symbol
Min. Typ. Max. UnitCondition
LCD drive voltage
SVD voltage
SVD circuit response time
Power current consumption
V
C1
V
C2
V
C3
V
SVD
t
SVD
I
OP
0.95
2·V
C1
x 0.9
3·V
C1
x 0.9
2.5
2.4
2.3
2.2
1.05
2.6
2.5
2.4
2.3
0.7
2.0
6.0
200
306
506
16.0
1.15
2·V
C1
+ 0.1
3·V
C1
+ 0.1
2.7
2.6
2.5
2.4
100
2.0
7.0
15.0
500
915
1515
45.0
V
V
V
V
V
V
V
µS
µA
µA
µA
µA
µA
µA
µA
V
CA = VC1, IC1 = -5 µA
Connect 1MΩ load resistor between V
SS and VC2
(without panel load)
Connect 1MΩ load resistor between V
SS and VC3
(without panel load)
SVDS = "0"
SVDS = "1"
SVDS = "2"
SVDS = "3"
During SLEEP
During HALT (32 kHz)
During execution (32 kHz) *1
During execution (1 MHz) *1
During execution (32 kHz) *2
During execution (32 kHz) *3
During execution (32 kHz) *4
Current that
flows in external
parts (loads)
such as the LCD
panel is not
included.
*1 The SVD, A/D converter and AMP circuits are OFF status.
*2 The A/D converter (reference voltage VR1 and middle electric potential GND are impressed from outside) is ON status.
The SVD and AMP circuits are OFF status.
*3 The A/D converter (reference voltage VR1 and middle electric potential GND are impressed from outside) and AMP
circuits (2 systems) are ON status. The SVD circuit is OFF status.
*4 The SVD circuit is ON status. The A/D converter and AMP circuits are OFF status.