Specifications
Table Of Contents
- Technical Hardware
- 1 OVERVIEW
- 2 POWER SUPPLY AND INITIAL RESET
- 3 CPU, ROM, RAM
- 4 PERIPHERAL CIRCUITS AND OPERATION
- 4.1 Memory Map
- 4.2 Resetting Watchdog Timer
- 4.3 Oscillation Circuit
- 4.4 Input Ports (K00–K03, K10)
- 4.5 Output Ports (R00–R03)
- 4.6 I/O Ports (P00–P03, P10–P13, P20–P23)
- 4.7 LCD Driver (COM0–COM3, SEG0–SEG31)
- 4.8 Clock Timer
- 4.9 Stopwatch Timer
- 4.10 Programmable Timer
- 4.11 Serial Interface (SIN, SOUT, SCLK, SRDY)
- 4.12 A/D Converter
- 4.13 General-purpose Operation Amplifier (AMP)
- 4.14 SVD (Supply Voltage Detection) Circuit
- 4.15 Interrupt and HALT/SLEEP
- 5 SUMMARY OF NOTES
- 6 DIAGRAM OF BASIC EXTERNAL CONNECTIONS
- 7 CHARACTERISTICS
- 8 PACKAGE
- 9 PAD LAYOUT
- Technical Software
- 1 INTRODUCTION
- 2 BLOCK DIAGRAM
- 3 PROGRAM MEMORY (ROM)
- 4 DATA MEMORY
- 5 INITIAL RESET
- 6 PERIPHERAL CIRCUITS
- 6.1 Watchdog Timer
- 6.2 OSC3
- 6.3 Input Ports (K00–K03 and K10)
- 6.4 Output Ports (R00–R03)
- 6.5 I/O Ports (P00–P03, P10–P13 and P20–P23)
- 6.6 LCD Driver
- 6.7 Clock Timer
- 6.8 Stopwatch Timer
- 6.9 Programmable Timer
- 6.10 Serial Interface Circuit
- 6.11 Amplifier
- 6.12 SVD (Supply Voltage Detection) Circuit
- 6.13 A/D Converter
- 6.14 Sleep
- 6.15 Interrupt
- 7 SUMMARY OF NOTES
- APPENDIX

I-122 EPSON S1C62740 TECHNICAL HARDWARE
CHAPTER 7: ELECTRICAL CHARACTERISTICS
DC Characteristics
If no special requirement
VDD = 3 V, VSS = 0 V, fOSC1 = 32.768 kHz, Ta = 25°C, VD1, VC1, VC2 and VC3 are internal voltage,
C1–C6 = 0.1 µF
7.3
Item
Symbol
Min. Typ. Max. UnitCondition
High level input voltage (1)
High level input voltage (2)
Low level input voltage (1)
Low level input voltage (2)
High level input current
Low level input current (1)
Low level input current (2)
High level output current (1)
High level output current (2)
Low level output current (1)
Low level output current (2)
Common output current
Segment output current
(during LCD output)
Segment output current
(during DC output)
VIH1
VIH2
VIL1
VIL2
IIH
IIL1
IIL2
IOH1
IOH2
IOL1
IOL2
IOH3
IOL3
IOH4
IOL4
IOH5
IOL5
0.8·VDD
0.9·VDD
0
0
0
-20
-0.5
3.0
6.0
3
3
0.2
-10
VDD
VDD
0.2·VDD
0.1·VDD
0.5
-5
0
-0.9
-1.8
-3
-3
-0.2
V
V
V
V
µA
µA
µA
mA
mA
mA
mA
µA
µA
µA
µA
mA
mA
VIH = 3.0 V
VIL1 = VSS
With pull up resistor
VIL2 = VSS
Without pull up resistor
VOH1 = 0.9·VDD
VOH2 = 0.9·VDD
VOL1 = 0.1·VDD
VOL2 = 0.1·VDD
VOH3 = VC3 - 0.05 V
VOL3 = 0.05 V
VOH4 = VC3 - 0.05 V
VOL4 = 0.05 V
VOH5 = 0.9·VDD
VOL5 = 0.1·VDD
K00~03, K10
P00~03, P10~13
P20~23, SIN, SCLK
RESET, TEST
K00~03, K10
P00~03, P10~13
P20~23, SIN, SCLK
RESET, TEST
K00~03, K10
P00~03, P10~13
P20~23, SIN, SCLK
RESET, TEST
K00~03, K10
P00~03, P10~13
P20~23, SIN, SCLK
RESET
K00~03, K10
P00~03, P10~13
P20~23, SIN, SCLK
R00, R01, P00~03
P10~13, P20~23
SOUT, SCLK, SRDY
R02, R03
R00, R01, P00~03
P10~13, P20~23
SOUT, SCLK, SRDY
R02, R03
COM0~3
SEG0~31
SEG0~31