Specifications
Table Of Contents
- Technical Hardware
- 1 OVERVIEW
- 2 POWER SUPPLY AND INITIAL RESET
- 3 CPU, ROM, RAM
- 4 PERIPHERAL CIRCUITS AND OPERATION
- 4.1 Memory Map
- 4.2 Resetting Watchdog Timer
- 4.3 Oscillation Circuit
- 4.4 Input Ports (K00–K03, K10)
- 4.5 Output Ports (R00–R03)
- 4.6 I/O Ports (P00–P03, P10–P13, P20–P23)
- 4.7 LCD Driver (COM0–COM3, SEG0–SEG31)
- 4.8 Clock Timer
- 4.9 Stopwatch Timer
- 4.10 Programmable Timer
- 4.11 Serial Interface (SIN, SOUT, SCLK, SRDY)
- 4.12 A/D Converter
- 4.13 General-purpose Operation Amplifier (AMP)
- 4.14 SVD (Supply Voltage Detection) Circuit
- 4.15 Interrupt and HALT/SLEEP
- 5 SUMMARY OF NOTES
- 6 DIAGRAM OF BASIC EXTERNAL CONNECTIONS
- 7 CHARACTERISTICS
- 8 PACKAGE
- 9 PAD LAYOUT
- Technical Software
- 1 INTRODUCTION
- 2 BLOCK DIAGRAM
- 3 PROGRAM MEMORY (ROM)
- 4 DATA MEMORY
- 5 INITIAL RESET
- 6 PERIPHERAL CIRCUITS
- 6.1 Watchdog Timer
- 6.2 OSC3
- 6.3 Input Ports (K00–K03 and K10)
- 6.4 Output Ports (R00–R03)
- 6.5 I/O Ports (P00–P03, P10–P13 and P20–P23)
- 6.6 LCD Driver
- 6.7 Clock Timer
- 6.8 Stopwatch Timer
- 6.9 Programmable Timer
- 6.10 Serial Interface Circuit
- 6.11 Amplifier
- 6.12 SVD (Supply Voltage Detection) Circuit
- 6.13 A/D Converter
- 6.14 Sleep
- 6.15 Interrupt
- 7 SUMMARY OF NOTES
- APPENDIX
I-114 EPSON S1C62740 TECHNICAL HARDWARE
CHAPTER 5: SUMMARY OF NOTES
SUMMARY OF NOTESCHAPTER 5
5.1 Notes for Low Current Consumption
The S1C62740 contains control registers for each of the circuits so
that current consumption can be lowered. These control registers
lower the current consumption through programs that operate the
circuits at the minimum levels.
The following text explains the circuits that can control operation
and their control registers. Refer to these when putting programs
together.
Table 5.1.1 Circuits and control registers
Circuits (and items) Control registers Order of consumed current
CPU HALT, SLEEP instructions See electrical characteristics (Chapter 7)
CPU operating frequency CLKCHG, OSCC See electrical characteristics (Chapter 7)
A/D converter ADON, GNDON0, GNDON1, VRON See electrical characteristics (Chapter 7)
AMP circuit AMPON0, AMPON1 See electrical characteristics (Chapter 7)
SVD circuit SVDON See electrical characteristics (Chapter 7)
Below are the circuit statuses at initial reset.
CPU: Operating status
CPU operating frequency: Low speed side (CLKCHG = "0"),
OSC3 oscillation circuit OFF status (OSCC = "0")
A/D converter: A/D converter OFF status (ADON = "0")
GND generation circuit OFF status (GNDON0, GNDON1 = "0")
Reference voltage generation circuit OFF status (VRON = "0")
AMP circuit: OFF status (AMPON0, AMPON1 = "0")
SVD circuit: OFF status (SVDON = "0")
Also, be careful about panel selection because the current con-
sumption can differ by the order of several µA on account of the
LCD panel characteristics.