Specifications
Table Of Contents
- Technical Hardware
- 1 OVERVIEW
- 2 POWER SUPPLY AND INITIAL RESET
- 3 CPU, ROM, RAM
- 4 PERIPHERAL CIRCUITS AND OPERATION
- 4.1 Memory Map
- 4.2 Resetting Watchdog Timer
- 4.3 Oscillation Circuit
- 4.4 Input Ports (K00–K03, K10)
- 4.5 Output Ports (R00–R03)
- 4.6 I/O Ports (P00–P03, P10–P13, P20–P23)
- 4.7 LCD Driver (COM0–COM3, SEG0–SEG31)
- 4.8 Clock Timer
- 4.9 Stopwatch Timer
- 4.10 Programmable Timer
- 4.11 Serial Interface (SIN, SOUT, SCLK, SRDY)
- 4.12 A/D Converter
- 4.13 General-purpose Operation Amplifier (AMP)
- 4.14 SVD (Supply Voltage Detection) Circuit
- 4.15 Interrupt and HALT/SLEEP
- 5 SUMMARY OF NOTES
- 6 DIAGRAM OF BASIC EXTERNAL CONNECTIONS
- 7 CHARACTERISTICS
- 8 PACKAGE
- 9 PAD LAYOUT
- Technical Software
- 1 INTRODUCTION
- 2 BLOCK DIAGRAM
- 3 PROGRAM MEMORY (ROM)
- 4 DATA MEMORY
- 5 INITIAL RESET
- 6 PERIPHERAL CIRCUITS
- 6.1 Watchdog Timer
- 6.2 OSC3
- 6.3 Input Ports (K00–K03 and K10)
- 6.4 Output Ports (R00–R03)
- 6.5 I/O Ports (P00–P03, P10–P13 and P20–P23)
- 6.6 LCD Driver
- 6.7 Clock Timer
- 6.8 Stopwatch Timer
- 6.9 Programmable Timer
- 6.10 Serial Interface Circuit
- 6.11 Amplifier
- 6.12 SVD (Supply Voltage Detection) Circuit
- 6.13 A/D Converter
- 6.14 Sleep
- 6.15 Interrupt
- 7 SUMMARY OF NOTES
- APPENDIX

S1C62740 TECHNICAL HARDWARE EPSON I-111
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Interrupt and HALT/SLEEP)
Control of interrupt
Tables 4.15.4(a) and (b) show the interrupt control bits and their
addresses.
Table 4.15.4(a) Control bits of interrupt (1)
*1 Initial value at the time of initial reset *5 Constantly "0" when being read
*2 Not set in the circuit *6 Refer to main manual
*3 Undefined *7 Page switching in I/O memory is not necessary
*4 Reset (0) immediately after being read
Address
Comment
Register
D3 D2 D1 D0 Name Init 1 0
*1
C0H
IPT
R
0
0
0
IPT
–
–
–
0
Unused
Unused
Unused
Interrupt factor flag (programmable timer)
Yes No
000
*2
*2
*2
*5
*5
*5
*4
C1H
ISIO
R
0
0
0
ISIO
–
–
–
0
Yes No
000
*2
*2
*2
*5
*5
*5
*4
C2H
IK1
R
0
0
0
IK1
Yes No
000
–
–
–
0
*2
*2
*2
*5
*5
*5
*4
IK0
R
0
0
0
IK0
–
–
–
0
Yes No
000
C3H
*2
*2
*2
*5
*5
*5
*4
C4H
IAD
R
0
0
0
IAD
–
–
–
0
Yes No
000
*2
*2
*2
*5
*5
*5
*4
C5H
ISW0
R
0
0
ISW1
ISW0
–
–
0
0
Yes
Yes
No
No
ISW100
*2
*2
*5
*5
*4
*4
C6H
IT32
R
IT1
IT2
IT8
IT32
0
0
0
0
Interrupt factor flag (clock timer 1 Hz)
Interrupt factor flag (clock timer 2 Hz)
Interrupt factor flag (clock timer 8 Hz)
Interrupt factor flag (clock timer 32 Hz)
Yes
Yes
Yes
Yes
No
No
No
No
IT8IT2IT1
*4
*4
*4
*4
C8H
EIPT
0
EIAD
EISIO
EIPT
0
0
0
Unused
Interrupt mask register (A/D converter)
Interrupt mask register (serial interface)
Interrupt mask register (programmable timer)
Enable
Enable
Enable
Mask
Mask
Mask
EISIOEIAD0
*2
*5
C9H
EIK0
0
0
EIK1
EIK0
–
–
0
0
Unused
Unused
Interrupt mask register (K10)
Interrupt mask register (K00–K03)
Enable
Enable
Mask
Mask
EIK100
*2
*2
*5
*5
CAH
SIK00
SIK03
SIK02
SIK01
SIK00
0
0
0
0
Enable
Enable
Enable
Enable
Disable
Disable
Disable
Disable
SIK01SIK02SIK03
R/W
*7
CBH
EISW0
R/W
0
0
EISW1
EISW0
–
–
0
0
Enable
Enable
Mask
Mask
EISW10
*2
*2
*5
*5
R/W
R/W
Interrupt selection register (K03)
Interrupt selection register (K02)
Interrupt selection register (K01)
Interrupt selection register (K00)
Unused
Unused
Interrupt mask register (stopwatch 1 Hz)
Interrupt mask register (stopwatch 10 Hz)
Unused
Unused
Unused
Interrupt factor flag (serial interface)
Unused
Unused
Unused
Interrupt factor flag (K10)
Unused
Unused
Unused
Interrupt factor flag (K00–K03)
Unused
Unused
Unused
Interrupt factor flag (A/D converter)
Unused
Unused
Interrupt factor flag (stopwatch 1 Hz)
Interrupt factor flag (stopwatch 10 Hz)
R
R
0
R