Specifications
Table Of Contents
- Technical Hardware
- 1 OVERVIEW
- 2 POWER SUPPLY AND INITIAL RESET
- 3 CPU, ROM, RAM
- 4 PERIPHERAL CIRCUITS AND OPERATION
- 4.1 Memory Map
- 4.2 Resetting Watchdog Timer
- 4.3 Oscillation Circuit
- 4.4 Input Ports (K00–K03, K10)
- 4.5 Output Ports (R00–R03)
- 4.6 I/O Ports (P00–P03, P10–P13, P20–P23)
- 4.7 LCD Driver (COM0–COM3, SEG0–SEG31)
- 4.8 Clock Timer
- 4.9 Stopwatch Timer
- 4.10 Programmable Timer
- 4.11 Serial Interface (SIN, SOUT, SCLK, SRDY)
- 4.12 A/D Converter
- 4.13 General-purpose Operation Amplifier (AMP)
- 4.14 SVD (Supply Voltage Detection) Circuit
- 4.15 Interrupt and HALT/SLEEP
- 5 SUMMARY OF NOTES
- 6 DIAGRAM OF BASIC EXTERNAL CONNECTIONS
- 7 CHARACTERISTICS
- 8 PACKAGE
- 9 PAD LAYOUT
- Technical Software
- 1 INTRODUCTION
- 2 BLOCK DIAGRAM
- 3 PROGRAM MEMORY (ROM)
- 4 DATA MEMORY
- 5 INITIAL RESET
- 6 PERIPHERAL CIRCUITS
- 6.1 Watchdog Timer
- 6.2 OSC3
- 6.3 Input Ports (K00–K03 and K10)
- 6.4 Output Ports (R00–R03)
- 6.5 I/O Ports (P00–P03, P10–P13 and P20–P23)
- 6.6 LCD Driver
- 6.7 Clock Timer
- 6.8 Stopwatch Timer
- 6.9 Programmable Timer
- 6.10 Serial Interface Circuit
- 6.11 Amplifier
- 6.12 SVD (Supply Voltage Detection) Circuit
- 6.13 A/D Converter
- 6.14 Sleep
- 6.15 Interrupt
- 7 SUMMARY OF NOTES
- APPENDIX
S1C62740 TECHNICAL HARDWARE EPSON I-103
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (SVD Circuit)
SVD (Supply Voltage Detection) Circuit4.14
Configuration of SVD
circuit
The S1C62740 has a built-in SVD (supply voltage detection) circuit,
so that the software can find when the source voltage lowers.
Turning the SVD circuit ON/OFF and the SVD criteria voltage
setting can be controlled through the software.
Figure 4.14.1 shows the configuration of the SVD circuit.
V
SVD circuit
Detection output
Data bus
DDA
V
SSA
SVDDT
SVDON
SVDS1
SVDS0
Criteria voltage
setting circuit
Fig. 4.14.1
Configuration of the SVD circuit
The SVD circuit compares the criteria voltage set by the software
and the supply voltage (V
DDA–VSSA) and sets its results into the
SVDDT latch. By reading the data of this SVDDT latch, it can be
determined by means of software whether the supply voltage is
normal or has dropped.
The criteria voltage can be set for the four types shown in Table
4.14.1 by SVDS0 and SCDS1.
SVD operation
Table 4.14.1
Criteria voltage setting
SVD1 SVD0 Criteria voltage
0 0 2.6 V
0 1 2.5 V
1 0 2.4 V
1 1 2.3 V
Set it to match the specifications, such as batteries, to be used.
When the A/D converter is used, a supply voltage of 2.4 V or more
is necessary for its operation. In this case, you should set the
criteria voltage to 2.5 V or 2.6 V.
When SVDON is set to "1", source voltage detection by the SVD
circuit is executed. As soon as SVDON is reset to "0", the result is
loaded to in the SVDDT register and SVD circuit goes OFF.