Specifications
Table Of Contents
- Technical Hardware
- 1 OVERVIEW
- 2 POWER SUPPLY AND INITIAL RESET
- 3 CPU, ROM, RAM
- 4 PERIPHERAL CIRCUITS AND OPERATION
- 4.1 Memory Map
- 4.2 Resetting Watchdog Timer
- 4.3 Oscillation Circuit
- 4.4 Input Ports (K00–K03, K10)
- 4.5 Output Ports (R00–R03)
- 4.6 I/O Ports (P00–P03, P10–P13, P20–P23)
- 4.7 LCD Driver (COM0–COM3, SEG0–SEG31)
- 4.8 Clock Timer
- 4.9 Stopwatch Timer
- 4.10 Programmable Timer
- 4.11 Serial Interface (SIN, SOUT, SCLK, SRDY)
- 4.12 A/D Converter
- 4.13 General-purpose Operation Amplifier (AMP)
- 4.14 SVD (Supply Voltage Detection) Circuit
- 4.15 Interrupt and HALT/SLEEP
- 5 SUMMARY OF NOTES
- 6 DIAGRAM OF BASIC EXTERNAL CONNECTIONS
- 7 CHARACTERISTICS
- 8 PACKAGE
- 9 PAD LAYOUT
- Technical Software
- 1 INTRODUCTION
- 2 BLOCK DIAGRAM
- 3 PROGRAM MEMORY (ROM)
- 4 DATA MEMORY
- 5 INITIAL RESET
- 6 PERIPHERAL CIRCUITS
- 6.1 Watchdog Timer
- 6.2 OSC3
- 6.3 Input Ports (K00–K03 and K10)
- 6.4 Output Ports (R00–R03)
- 6.5 I/O Ports (P00–P03, P10–P13 and P20–P23)
- 6.6 LCD Driver
- 6.7 Clock Timer
- 6.8 Stopwatch Timer
- 6.9 Programmable Timer
- 6.10 Serial Interface Circuit
- 6.11 Amplifier
- 6.12 SVD (Supply Voltage Detection) Circuit
- 6.13 A/D Converter
- 6.14 Sleep
- 6.15 Interrupt
- 7 SUMMARY OF NOTES
- APPENDIX
S1C62740 TECHNICAL HARDWARE EPSON I-91
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (A/D Converter)
Fig. 4.12.15
Circuit diagram at the time of resistance measurement
+
–
BUF
+
–
+
–
CAZ CIBF
INT
CMP
GND
S
1
RI
S
2
S3
CO
AI2(AI3)
VR, -VR
generation
circuit
-VR
VR
V
IN
GND
VR = -VRref
GND
VRref
Thermistor
etc. R
AI4
VR1
To A/D converter
control circuit
Rref
• Resistance measurement mode
At the time of resistance measurement, the non-inverted input of
the integral AMP is set to the GND level.
As shown in Figure 4.12.15, a voltage drop of the reference resist-
ance is obtained as the reference voltage at the time of resistance
measurement by impressing a V
R1 voltage from the AI4 terminal
onto the reference resistance connected between the AI4–AI3 (or
AI2) terminals. You can obtain an A/D conversion value according
to the resistance value by A/D conversion of the voltage generated
by the measured resistance connected between AI3 (or AI2) and
GND, using the reference voltage generated by the reference resist-
ance, VR.
For this reason, even when the resistance value of the measured
resistance has been changed to the maximum/minimum, you
should adjust the resistance, such that the voltage that is input
into the A/D converter does not exceed ±320 mV (GND reference).
When using an internally generated V
R1, a resistance should be
used such that the resistance variation range is within a
maximum:minimum of 4:1 and this condition is met by setting the
reference resistance at 1/2 of the resistance variation range of the
measured resistance.
However, you should configure the circuit such that the reference
resistance becomes 1 kΩ to 1 MΩ. Also be careful of these condi-
tions when externally impressing V
R1.
When the measured resistance has been made R and the reference
resistance has been made Rref, the voltage V
IN input into the A/D
converter and the reference voltage VR are expressed by the follow-
ing expressions.
V
IN = VR1 * R / (R + Rref) (Expression 4.12.5)
VR = VR1 * Rref / (R + Rref) (Expression 4.12.6)
According to the Expressions 4.12.4, 4.12.5 and 4.12.6, it becomes
R = n * Rref / N
(Expression 4.12.7)