Specifications
Table Of Contents
- Technical Hardware
- 1 OVERVIEW
- 2 POWER SUPPLY AND INITIAL RESET
- 3 CPU, ROM, RAM
- 4 PERIPHERAL CIRCUITS AND OPERATION
- 4.1 Memory Map
- 4.2 Resetting Watchdog Timer
- 4.3 Oscillation Circuit
- 4.4 Input Ports (K00–K03, K10)
- 4.5 Output Ports (R00–R03)
- 4.6 I/O Ports (P00–P03, P10–P13, P20–P23)
- 4.7 LCD Driver (COM0–COM3, SEG0–SEG31)
- 4.8 Clock Timer
- 4.9 Stopwatch Timer
- 4.10 Programmable Timer
- 4.11 Serial Interface (SIN, SOUT, SCLK, SRDY)
- 4.12 A/D Converter
- 4.13 General-purpose Operation Amplifier (AMP)
- 4.14 SVD (Supply Voltage Detection) Circuit
- 4.15 Interrupt and HALT/SLEEP
- 5 SUMMARY OF NOTES
- 6 DIAGRAM OF BASIC EXTERNAL CONNECTIONS
- 7 CHARACTERISTICS
- 8 PACKAGE
- 9 PAD LAYOUT
- Technical Software
- 1 INTRODUCTION
- 2 BLOCK DIAGRAM
- 3 PROGRAM MEMORY (ROM)
- 4 DATA MEMORY
- 5 INITIAL RESET
- 6 PERIPHERAL CIRCUITS
- 6.1 Watchdog Timer
- 6.2 OSC3
- 6.3 Input Ports (K00–K03 and K10)
- 6.4 Output Ports (R00–R03)
- 6.5 I/O Ports (P00–P03, P10–P13 and P20–P23)
- 6.6 LCD Driver
- 6.7 Clock Timer
- 6.8 Stopwatch Timer
- 6.9 Programmable Timer
- 6.10 Serial Interface Circuit
- 6.11 Amplifier
- 6.12 SVD (Supply Voltage Detection) Circuit
- 6.13 A/D Converter
- 6.14 Sleep
- 6.15 Interrupt
- 7 SUMMARY OF NOTES
- APPENDIX
I-88 EPSON S1C62740 TECHNICAL HARDWARE
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (A/D Converter)
• Positive input voltage
Buffer AMP
output voltage
Integral AMP
output
Comparator
output
GND
GND
GND
Auto zero
adjustment
Input
integration
Reverse
integration
Auto zero
adjustment
*2
*1
*1: This voltage is proportional to input
*2: Time is proportional to input voltage
*3: The gradient is fixed
*3
• Negative input voltage
Buffer AMP
output voltage
Integral AMP
output
Comparator
output
GND
GND
Auto zero
adjustment
Input
integration
Reverse
integration
Auto zero
adjustment
GND
Input integration period
When the auto zero adjustment period terminates, start the inte-
gration of the input voltage by connecting switch S1 to the V
IN side
and turning switches S2 and S3 OFF. The input voltage of the
integral AMP changes according to the time constant of the integral
resistance RI and the condenser CI, and the waveform that indi-
cated in Figure 4.12.13 is output by the integral AMP.
(2)
Auto zero adjustment period
Auto zero adjustment is the sequence initially effected in order to
compensate for error in the A/D conversion results, due to the
offset voltage of the buffer AMP (BUF), the integral AMP (INT) and
comparator (CMP).
The switch S1 in Figure 4.12.12 is connected on the GND at the
beginning of this period and switches S2 and S3 go ON.
Then switch S2 goes OFF, and voltage is charged into CAZ to
correct the offset.
The auto zero adjustment period becomes the time counted for only
the number of resolution counts that have specified the 32 kHz
clock.
(1)
Fig. 4.12.13
Output waveform at the
time A/D conversion