Specifications

40 EPSON S1C60N04 TECHNICAL MANUAL

CHAPTER 9: PRECAUTIONS ON MOUNTING

CHAPTER 9PRECAUTIONS ON MOUNTING

● Oscillation characteristics change depending on conditions (board pattern, components used, etc.).

In particular, when a ceramic oscillator or crystal oscillator is used, use the oscillator manufacturer’s

recommended values for constants such as capacitance and resistance.

● Disturbances of the oscillation clock due to noise may cause a malfunction. Consider the following

points to prevent this:

(1) Components which are connected to the OSC1

and OSC2 terminals, such as oscillators,

resistors and capacitors, should be connected in

the shortest line.

(2) As shown in the right hand figure, make a V

pattern as large as possible at circumscription

of the OSC1 and OSC2 terminals and the

components connected to these terminals.

Furthermore, do not use this V

DD pattern for

any purpose other than the oscillation system.

OSC1

OSC2

Sample VDD pattern

● In order to prevent unstable operation of the oscillation circuit due to current leak between OSC1 and

SS, please keep enough distance between OSC1 and VSS or other signals on the board pattern.

● The power-on reset signal which is input to the RESET terminal changes depending on conditions

(power rise time, components used, board pattern, etc.).

Decide the time constant of the capacitor and resistor after enough tests have been completed with the

application product.

When the built-in pull-down resistor of the RESET terminal, take into consideration dispersion of the

resistance for setting the constant.

● In order to prevent any occurrences of unnecessary resetting caused by noise during operating,

components such as capacitors and resistors should be connected to the RESET terminal in the

shortest line.

● Sudden power supply variation due to noise may cause malfunction. Consider the following points to

prevent this:

(1) The power supply should be connected to the V

DD and VSS terminal with patterns as short and

large as possible.

(2) When connecting between the V

DD and VSS terminals with a bypass capacitor, the terminals

should be connected as short as possible.

Bypass capacitor connection example