Specifications
4 Special Operations in ASICs that Include C33 Macros
S1C33 ASIC DESIGN GUIDE
EPSON
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EMBEDDED ARRAY S1X50000 SERIES
4.5 Test Pattern Creation
4.5.1 DC/AC Test Pattern Creation
Of the DC/AC test items, the user must create all the test patterns except the input level verification
test. Refer to section 3.2, "DC/AC Test Mode," in this document and the S1L50000 SERIES DESIGN
GUIDE for more information on test pattern creation.
4.5.2 C33 Macro/User Circuit Connection Verification Test Pattern
Creation
While the test patterns for verifying user circuit functionality must be created to operate in user circuit
test mode, in addition to this functional verification, the user must also create test patterns to verify
the connections between the C33 macros and the user circuits. These connection verification test
patterns must be created in accordance with the contents of chapter 5, "Simulation," in this document.
These test patterns must include patterns that operate the C33 blocks and access the user circuits, as
well as patterns that can observe, from outside the IC, all signals that connect C33 macros to user
circuits. Below, we present the flowchart for an example of verifying connection of the address, data,
chip enable, read, and write signals that connect to the user circuits.
(1) Set up the areas allocated for user circuits internal access by setting the BCU register.
(Set an arbitrary bit in 0x48132/D[F:8] to 1.)
↓
(2) Write an arbitrary data value to an arbitrary register in the user circuits.
↓
(3) Read out the register written in step (2).
↓
(4) Write the read data to an arbitrary address in an external area that does not exist on the chip.
Verify the following signals during the above sequence.
(2) Verify the address (U_ADDR), data (U_DOUT), chip enable (U_CEx_X), and write
(U_WRL_X/U_WRH_X) connections.
(3) Verify the address (U_ADDR), data (U_IN), chip enable (U_CEx_X), and read (U_RD_X)
connections.
(4) The read data is output from P_D[15:0] by writing that read data to an external area. These
values are then the expected values for the test pattern.