Specifications

4 Special Operations in ASICs that Include C33 Macros
S1C33 ASIC DESIGN GUIDE
EPSON
65
EMBEDDED ARRAY S1X50000 SERIES
4.4 Connections between User I/O, User Circuits, and C33
Macros
4.4.1 Connections between C33 Macros and User Circuits
The connections between C33 macros and user circuits are handled by connecting the required pins
as desired from the C33 macro user pins. Since the user pins can be controlled from external pins in
user circuit test mode, there is no need to add special test circuits.
4.4.2 Connections between C33 Macros and User I/O
As a basic policy, I/O with built-in test functions is used for user I/O, and the user I/O is connected to
the C33 macros as listed in the table below. This connection method allows the DC/AC test mode
functions provided by the C33 macros to be used. This means that there is no need to add DC/AC test
circuits in the user circuits.
4.4.3 Notes on the Use of 5 V Tolerant I/O Cells
Note that since there are no I/O cells with built-in test functions in the S1X50000 Series 5 V tolerant
I/O cells, the C33 macro DC/AC test mode cannot be used. If these cells are used, the user must
provide the following test patterns for the pins that use the 5 V tolerant I/O cells.
A. Input logic level verification: Test patterns in which all inputs transition from the
0 to 1 state, and patterns in which all inputs
transition from the 1 to 0 state.
B. Output characteristics (V
OH
/V
OL
): Test patterns for which all outputs transition from
the low to high levels, and patterns in which all
outputs transition from the high to low levels.
C. Bidirectional pins: Test patterns which meet both conditions A and B
above.
C33 macro pins Usage
TST_USER Use this signal to set user circuits to the test state.
TST_TA Connect this signal to the I/O cell TA pin.
TST_TE_X Connect this signal to the I/O cell TE pin.
TST_TS Connect this signal to the I/O cell TS pin.