Specifications

3 C33 Test Functions
56
EPSON
S1C33 ASIC DESIGN GUIDE
EMBEDDED ARRAY S1X50000 SERIES
$PATTERN
# PPPPPPPPPPPPPPPPPPPPPPPPBOO
# ________________________IUU
# RXIOEEBADDDDDDDDDDDDDDDDOTT
# E2CSAAC11111119876543210112
# SSEC11L 543210
# EPM300K
# TDD MM
# XX 10
#
# IIIPIIOBBBBBBBBBBBBBBBBBBOO
# U D U
#
0 000P00LXXXXXXXXXXXXXXXXXHLX
1 000P00LXXXXXXXXXXXXXXXXXHLH
2 000P00LL0000000000000000HLH
3 000P00LL0000000000000000HLH
4 001P00L000000000000000000ZL
5 001P00L000000000000000000ZL Test mode input sequence
6 011P00L000000000000000000ZL
7 001P00L000000000000000000ZL
8 011P00L000000000000000000ZL
9 001P00L000000000000000000ZL
10 011P00L000000000000000000ZL
11 001P00L000000000000000000ZL
12 001P00L000000000000000000ZL
14 111P00XLLLLLLLLLLLLLLLLLLLL
15 111P11X000000000000000000ZH
Quiescent current drain measurement (Bidirectional pins in
20 111P01X000000000000000000ZH
input mode and 3-state pins in the high-impedance state)
25 111P10XHHHHHHHHHHHHHHHHHHHH
Quiescent current drain measurement (Bidirectional pins
30 111P00XLLLLLLLLLLLLLLLLLLLL
and 3-state pins in output mode)
35 111P00XLLLLLLLLLLLLLLLLLLLL
36 111P11X000000000000000000ZH Output characteristics (V
OH
/V
OL
) measurement
40 111P11XHHHHHHHHHHHHHHHHHHZH
41 111P10XHHHHHHHHHHHHHHHHHHHH
⋅⋅⋅⋅⋅⋅
All outputs: high level
45 111P10XHHHHHHHHHHHHHHHHHHHH
46 111P11X000000000000000000ZH
47 111P01X000000000000000000ZH
50 111P01X000000000000000000ZH
52 111P00XLLLLLLLLLLLLLLLLLLLL
⋅⋅⋅⋅⋅⋅
All outputs: low level
55 111P00XLLLLLLLLLLLLLLLLLLLL
57 111P11X000000000000000000ZH
60 111P11X000000000000000000ZH
63 101P11XHHHHHHHHHHHHHHHHHHHH
65 101P11XHHHHHHHHHHHHHHHHHHHH
68 101P01XLHHHHHHHHHHHHHHHHHHH
70 101P01XLHHHHHHHHHHHHHHHHHHH Special-purpose AC path measurement
73 101P11XHHHHHHHHHHHHHHHHHHHH
75 101P11XHHHHHHHHHHHHHHHHHHHH (Used to measure the delay from P_EA10M1 to
78 101P01XLHHHHHHHHHHHHHHHHHHH P_A1.)
80 101P01XLHHHHHHHHHHHHHHHHHHH
85 101P11XHHHHHHHHHHHHHHHHHHHH
88 111P11X000000000000000000ZH
90 111P11X000000000000000000ZH
93 111P11H000000000000000000ZH Input logic level verification (Created by Seiko
95 111P11H000000000000000000ZH Epson.)
98 111P11L000000000000000000ZH Monitors the high/low level inputs to a certain input
100 111P11L000000000000000000ZH pin from the P_BCLK pin.
103 111P11H000000000000000000ZH (This cannot be simulated.)
105 111P11H000000000000000000ZH