Specifications

2 C33 Macro Specifications
26
EPSON
S1C33 ASIC DESIGN GUIDE
EMBEDDED ARRAY S1X50000 SERIES
2.6.6.2 AC Characteristics Measurement Condition
Signal detection level: Input signal High level V
IH
= V
DD
- 0.4 V
Low level V
IL
= 0.4 V
Output signal High level V
OH
= 1/2 V
DD
Low level V
OL
= 1/2 V
DD
The following applies when OSC3 is external clock input:
Input signal High level V
IH
= 1/2 V
DD
Low level V
IL
= 1/2 V
DD
Input signal waveform: Rise time (10% → 90% V
DD
) 5 ns (I/O buffer pins)
Fall time (90% → 10% V
DD
) 5 ns (I/O buffer pins)
Output load capacitance: CL = 50 pF (I/O buffer pins only)
F/O = 1 (User logic interface)