Specifications
REV.-A
A.1.l
CPU
/APD7810HG
(2c)
The
pPD78
10/781 1 HG is comprised of an 8-bit timer counter, an 8-bit A/D converter, 256 bytes of
RAM, and a serial interface. A system can easily be constructed with this IC. The main features of this
IC are listed below.
O 256 bytes of built-in RAM (addresses
FFOOH-FFFFH)
0 4096 bytes mask ROM (addresses
O-OFFFH)
for the 7811 CPU
O Direct addressing of up to 64K
O 8-bit A\D converter
O 158 instructions
O 0.8
~s instruction cycle (15 MHz)
O 16-bit event counter
O Two 8-bit timer counters
O 3 external and 8 internal interrupts (6 priority levels and 6 interrupt addresses)
O General purpose serial interface (asynchronous, synchronous, and
1/0
modes)
O
1/0
line (781
1
:40-bit
1/0
port; 78 10:24-bit edge detection, 4 inputs)
O
Zero cross detection
O Standby function
O Built-in clock pulse circuit
O NMOS
Figures A-1 and A-2 illustrate the 780 1/78 11 HG microprocessor; Tables A-2 through A-5 describe its
function.
PAO
PA 1
PA2
PA3
PA4
PA5
PA6
PA7
PBO
PB1
PB2
PB3
PB4
PBS
PB6
PB7
Pco
Pc
1
PC2
PC3
PC4
PC5
PC6
PC7
ml
INT
1
MOOE 1
l?:?:;
x2
xl
v
Ss
—
~
—
;
—
63
—
—
3
62
—
—
61
—
;
—
60
—
—
6
59
—
—
7
58
—
—
8
57
—
—
9
56
—
—
10
—
—
11
2:
—
—
12
53 —
—
13
52 —
—
14
51
—
—
Is
50 —
—
16
49 —
—
17
48 —
—
1s
47 —
—
46 —
—
;:
45 —
—
21
44 —
—
22
43 —
—
23
42 —
— 24
41
—
—
—
;:
::
—
—
—
27
38 —
—
28
37 —
— 29
36 —
— 30
35 —
—
34 —
—
:;
33 —
Vcc
VDIJ
PD7
PD6
PD5
PD4
PD3
P132
?01
PDO
PF7
PF6
PF5
PF 4
PF3
PF2
PF 1
PFO
ALE
G
m
AVCC
VARCF
AN7
AN6
AN5
AN4
AN3
AN2
AN1
ANO
AV
SS
.
.
.
.
-=,
‘U2
Figure A-1. wPD781 0/781
1
Pin Diagram
A-2