Specifications
46
S1C33 Family Development Environment
■ S5U1C330C2S
This tool provides co-simulation, and emulation environments for your C source code, assembler source code, or
HDL source code written in Verilog HDL language. The separately available Verilog simulator (Verilog-XL,
ModelSim), MAX + plusII, Quartus (Altera Corporation), S5U1C33001Mx, and S5U330C2D1 are required.
■ S1C33 ASIC DESIGN KIT
Development environment for custom microcomputers. This tool provides a simulation environment aiming for
sign-off of ASIC microcomputers. It is customized before shipment to suit the specifications of your custom
microcomputer.
ASIC
and
others
RAMROM
Model for
33 custom
microcomputer
C Compiler
Assembler
Linker
Simple assembler
Verilog simulator
AS33S5U1C33000C
On the WSOn the PC
C compiler
Assembler
Linker
MAX + plus II
Debugger
db33
• CPU core simulator
• ROM model
• RAM model
ASIC
and
others
ROMRAM
33209
full-model
.c
.s
C source Assembly source
.v
Verilog-HDL file
Verilog simulatorVerilog simulator
High-speed 33209 full-model
co-simulation environment
Linked with the db33 debugger
Supports standalone simulation
without debugger (simple
co-simulation)
High-speed co-simulation
environment with higher
CPU core speed
Linked with the db33
debugger
Final product with
actual IC
Emulation environment
by CPLD and FPGA
S5U1C330C2D1
is for APEX20K400 use
S5U1C33000H
S5U1C33001M1
etc.
F10K100
PLI33PLI33
ASIC
and
others
33209
co-simulation
model
(other than CPU)
S5U1C33000C
S5U1C33209E1
S1C33209
ASIC etc.