Specifications

31
PF1239-02
S1C33210 (Mobile Access Gateway IC)
32-bit Single Chip Microcomputer
32-bit RISC CPU
HDLC Controller
Three Serial I/O (SIO) Interfaces
8K Bytes of Built-in RAM
Multiply-and-accumulate Instructions
DESCRIPTION
The S1C33210 single-chip microcomputer consists of the S1C33000 CMOS 32-bit RISC CPU core plus an HDLC
controller, three serial I/O (SIO) interfaces, 8K bytes of built-in RAM, a direct memory access (DMA) controller,
timers, an analog-to-digital converter, and other components. The device features both high-speed operation and
low power consumption. The HDLC controller, serial I/O (SIO) interfaces, and other components necessary for
mobile access make this device ideal for data communications adapters, PDAs, and other portable information
equipment. The multiply-and-accumulate instructions and analog-to-digital converter support voice recognition,
voice synthesis, and other forms of digital signal processing for use in portable multimedia terminals.
FEATURES
CMOS LSI with 32-bit parallel processing... S1C33000 RISC CPU
Main clock ................................................... 50MHz (Max., with built-in 4× phase-locked loop)
Sub clock ....................................................32.768kHz (Typ.) crystal oscillator
Instruction set..............................................16-bit fixed-length arithmetic, highly orthogonal 105-member
instruction set, multiply-and-accumulate (MAC) instructions
that execute in two cycles
Built-in RAM ................................................8,192 bytes
Clock timer .................................................. 1 channel
Programmable timers .................................8 bits × 6 channels and 16 bits × 6 channels
PWM timer ..................................................Application for 16-bit programmable timer
Watchdog timer ........................................... Application for 16-bit programmable timer
PDC interface..............................................1 channel
Control interface represents application for serial I/O (SIO)
interface.
PHS interface .............................................. 1 channel
Control interface represents application for serial I/O (SIO)
interface. Supports both 32 and 64 kbps.
Built-in I.460 speed conversion.
HDLC controller .......................................... 1 channel
Serial interfaces ..........................................3 channels
Choice of clock synchronous or asynchronous operation. (ch0, ch2)
(ch1 only
supports asynchronous system
.)
Configurable as infrared (IrDA) interfaces.
10-bit analog-to-digital converter ................Cumulative comparison operation, 4 input channels.
High-speed DMA.........................................4 channels
Intelligent DMA............................................128 channels
General-purpose I/O ports ..........................Input port : 7 bits
I/O port : 27 bits
These pins double as I/O pins for the onboard peripherals.
Interrupt controller.......................................External interrupts : 10 types
Internal interrupts : 29 types
External bus interfaces ............................... 24-bit address bus, 16-bit data bus, 7 chip enable outputs.
Direct connection to DRAM and burst ROM.
Built-in Analog-to-digital Converter
High-speed DMA and Intelligent DMA
Low Power Consumption
PDC, PHS, and CdmaOne Interfaces
1
1: These interfaces require the software
modem module.