Specifications

25
PF1134-03
S1C33S01
32-bit Single Chip Microcomputer
High-speed 32-bit RISC Core
Multiply Accumulation
8K-byte RAM Built-in
2-ch. SIO
DESCRIPTION
The S1C33S01 consists of the S1C33000 32-bit RISC type CPU as the core, a bus control unit, an interrupt
controller, timers, serial interface circuits, 8K-byte RAM and other circuits. It also includes a high-speed oscilla-
tion circuit, PLL and low-speed oscillation circuit allowing high-speed operation and low-power operation with
excellent clock functions. The S1C33S01 also provides a DSP function, by using the internal MAC (multiplica-
tion and accumulation) operation function, it makes it possible to design simply voice synthesis systems.
FEATURES
CMOS LSI 32-bit parallel processing ............. S1C33000 RISC core
Main clock ....................................................... 50MHz (Max., up to 12.5MHz external clock input)
Sub clock ........................................................ 32.768kHz (Typ., crystal)
Instruction set.................................................. 16-bit fixed length, 105 instructions
(MAC instruction is included, 2 cycles)
Internal RAM size............................................8,192 bytes
Clock timer ...................................................... 1 channel
Programmable timer ....................................... 8 bits × 4 channels and 16 bits × 6 channels
Watchdog timer ............................................... Realized with a 16-bit programmable timer
Serial interface ................................................ 2 channels
Clock synchronization type and asynchronization type are
selectable. Usable as an infrared ray (IrDA) interface.
I/O port ............................................................I/O port : 29 bits
Pins are shared with the inputs and outputs of built-in
peripheral circuits.
Interrupt controller...........................................External interrupts : 8 types
Internal interrupts : 23 types
External bus interface ..................................... 24-bit address bus
(High-order 4 bits are shared with the I/O ports)
16-bit data bus
6 chip enable pins
(shared with the I/O ports)
SRAM, DRAM and burst ROM may be connected directly.
Shipping form .................................................. QFP15-100pin
Supply voltage ................................................ 1.8 to 3.6V (single power supply)
Current consumption ...................................... SLEEP state : 10µA
(3.3V, 32.768kHz, clock timer run state, Typ.)
:2.5µA
(2.0V, 32.768kHz, clock timer run state, Typ.)
RUN state : 49mA (3.3V, 60MHz Typ.)