Specifications

22
S1C33L01
BLOCK DIAGRAM
VDD
VSS
VDDE1
A[23:0]
D[15:0]
#RD
#WRL/#WR/#WE/#LWE
#WRH/#BSH/#UWE
#HCAS/#UWE
#LCAS/#CAS
#CE10IN, #CE10EX, #CE[9:3]
#EMEMRD
#WAIT(P30)
#DRD(P20)
#DWE(P21)
#GAAS(P21)
#GARD(P31)
OSC3
OSC4
PLLS[1:0]
PLLC
OSC1
OSC2
FOSC1(P14)
#DMAREQx(K50, K51, K53, K54)
#DMAACKx(P32, P33, P04, P06)
#DMAENDx(P15, P16, P05, P07)
AD0–7(K60–67)
#ADTRG(K52)
AVDDE
AVSS
K50–54
K60–67
#RESET
#NMI
#X2SPD
ICEMD
DSIO
EA10MD[1:0]
BCLK
#BUSREQ(P34)
#BUSACK(P35)
#BUSGET(P31)
DST[2:0](P10–12)
DPCO(P13)
DCLK(P14)
T8UFx(P10–13)
SINx(P00, P04)
SOUTx(P01, P05)
#SCLKx(P02, P06)
#SRDYx(P03, P07)
P00–07
P10–16
P20–27
P30–35
S1C33L01
EXCLx(P10–13, P15, P16)
TMx(P22–27)
FPDAT[11:0]
FPFRAME
FPLINE
FPSHIFT
LCDPWR
DRDY
CLKI
CKSEL[2:0]
CNF3
GPIO0
VDDE2
S1C33000
Bus Control Unit
CPU Core
Interrupt
Controller
Prescaler
OSC3/PLL
OSC1
Clock
Timer
ROM
128KB
RAM
8KB
VRAM
40KB
Intelligent
DMA (128 ch.)
High-speed
DMA (4 ch.)
8-bit
Programmable
Timer (4 ch.)
Serial Interface
(2 ch.)
A/D Converter
(8 ch.)
Input Port
I/O Port
LCD Controller
(S1D13705)
16-bit
Programmable
Timer (6 ch.)