Specifications

Appendrx B
IC or Circuit
TMP90C41
1 we U-O.
1’ U.eb.C”.ea “, ,Icc: I.IUC#C 1v U.W UC, ~-UC,0
Location Functions
IC21
Receives data from the host computer and loads the data to the
input buffer in RAM (under interrupt processing control).
Expands the input data held in the buffer to create image data.
Loads this image data to the image buffer in RAM. Transfers the
image data to the printhead drive circuit. Also controls various
parts of the printer mechanism, such as the motors.
E05A50
ICll This gate array consists of three components configured on a
single chip:
Memory Management Unit
Handles CPU memory in ROM, RAM, and mask ROM, and
assigns addresses for other devices.
Parallel interface (Parallel VF)
Holds the parallel interface functions.
Reset Circuit
Contains the circuit that generates the /RESET signal.
PROM
RAM
IC14
The PROM contains the program that runs the CPU.
IC15 and IC16 Holds the CPU working area and the various buffers. (1 E is not
used for an 80column device and is not installed.)
Mask ROM
EEPROM
IC17 and IC16 Holds the character design (also called the character generator).
IC12
The EEPROM is an electronically writable and erasable ROM
used to hold such information as the TOF position.
Head Gate Array
IC2
This gate array consists of three components configured on a
single chip:
Change order of the head pulse outputs
Mode 1: HD~-oHD~*HD~......*HD~~=+HD~~*HD~~
Mode 2: HD24=+2HD2WHD22e......eHDMHD2*HDl
Delay control (for low noise)
Image data latching
Vref Circuit
-
This circuit generates the reference voftage used in the A/D
converter within the CPU.
B-8
Epson LQ-570+/1070+