Service manual

Principles of Operation
Host Interface
Figure 2-52 shows the host interface circuit. -STROBE pulses from the host
computer pass through the low-pass filter formed by R32 and C21 and then flow
into the -STRB terminal. These pulses latch the parallel data and set the BUSY
signal HIGH, inhibiting subsequent data transfer. The -STROBE signal
automatically outputs the gate array’s -PINT terminal to request a CPU
interrupt. When the CPU receives the interrupt request, it reads the data latched
in the gate array.
Figure 2-52. Host Interface
LQ-200/AP3000
2-55