Service manual

Principles of Operation

Power on or off

D14, R69, and C26, shown in Figure 2-25, comprise an on/off reset circuit. This

circuit causes the CPU to begin operation from address 0000H when you turn on

the, power and it prevents CPU malfunctions when you turn off the power.

The rising edge of the Vx voltage cancels the -RESET signal following a constant-

time delay (R69

C26) produced by the gate array, resistor R69, and capacitor

C26. The falling edge of the Vx voltage activates the -RESET signal by

discharging capacitor C26 via diode D14.

Gate array pins 49 to 51 are used for waveform shaping.

Figure 2-26.

-RESET Output

-INIT signal input from CN1

The external -INIT signal (50 psec or more) passes through the low-pass filter by

R31 and C22. The signal is wave shaped within the gate array (pin 47, ICGC) so

that the -DISC terminal is set to LOW. This causes capacitor C26 to discharge,

setting the -THLD terminal to LOW. Then the -Rout terminal outputs the

-RESET signal.

2-26 LQ-2OO/AP3000