Specifications

REV.-A
Power On
t
CpU Self Reset
4
+6 V Line
VCCOM
THLD
??EStt
I
I
u
Figure 2-20. /F?ESET Signal Timing
2.3.3 Sensor Circuits
Figure 2-21 shows thesensorcircuits block diagram. Detection of any excessive printheadtemperature
causes the TEMP2 signal to be sent directly to the CPU. Other signals, such as the CRHOME signal,
pass through the each low path filters before reaching the CPU. Terminals P50 to P55 on the CPU
are used for the ND mnvertor. The Vref circuit generates the A/D mnverior reference voltage Vref.
Printhead
I TMP2 1-
1 I
----------------------------
---------------
,: Sensor Circuit
+5
,,
4
‘: L
t
k
D
,
LEVER
6.2K
I
GAP
‘E-1
D
‘‘1 ‘ ~’~n. ‘
:
=“”’ :
dvk
a
-. . . . . . . . .
1
0.022 ;
4
3
T
LEVER
%’
777-;
GAP
--- .
- - - --- --- ---- - - ----- - - --1
PE-1
PE-2
Vref Circuit
CRHOME, :
r
.--------------,
Head Drive Voltage
(+35V) monitor Circuit
D
CPU(IC21
P50
P31
P34
P52
P53
P54
VREF
P51
)
Figure 2-21. Sensor Circuit Block Diagram
2-16