Specifications

InstallationEP-MVP4F
Page 3-5
Section 3-2
System Memory Configuration
Memory Layout
The EP-MVP4F supports (2) 168-pin DIMMs (Dual In-line Memory Module).
The DIMMs can be either EDO (Extended Data Out) or SDRAM (Synchronized
DRAM). The DIMMs may be installed using just one chip.
• DIMM SDRAM may be 83MHz (12ns), 100MHz (10ns) or
125MHz (8ns) bus speed.
• If you use both 50ns and 60ns memory you must configure
your BIOS to read 60ns.
• When using Synchronous DRAM we recommend using the
4 clock variety over the 2 clock.
Figure 2 and Table 1 show several possible memory configurations using
yromeMlatoT
1MMID
)1/0knaB(
2MMID
)3/2knaB(
BM821=
mumixaM
*MARDS/ODE
,BM46,BM23,BM61,BM8
1XBM821
enoN
BM652=
mumixaM
*MARDS/ODE
,BM46,BM23,BM61,BM8
1XBM821
*MARDS/ODE
,BM46,BM23,BM61,BM8
1XBM821
DIMM 1
DIMM 2
Bank 0/1
Bank 2/3
-Synchronous
-EDO
Figure 2
* SDRAM only supports 8, 16, 32, 64, 128MB DIMM modules.
* We recommend to use PC100 Memory Module for bus speed between
66MHz and 100MHz.
Table 1