Operation Manual

BIOS
Page 4-8
DRAM Timing By SPD: Select Enabled for setting SDRAM timing by SPD.
The Choice: Enabled, Disabled.
DRAM Clock : The item will synchronize/asynchronize DRAM operation clock.
Default is by SPD.
100MHz: DRAM is running at 100MHz frequency.
133MHz: DRAM is running at 133MHz frequency.
SDRAM Cycle length: This setting defines the CAS timing parameter of the
SDRAM in terms of clocks. Default is by SPD.
2: Provides faster memory performance.
3: Provides better memory compatibility.
Bank Interleave: The item allows you to set how many banks of SDRAM support
in your mainboard. Default is by SPD.
The Choice: 2 Bank, 4 Bank, Disabled.
4-3 Advanced Chipset Features
Choose the “CHIPSET FEATURES SETUP” in the CMOS SETUP UTILITY menu
to display following menu.
Figure 4: Chipset Features Setup