Technical information

AWARD BIOS 4-7
Note: When you insert slow memory modules in the system and set a faster timing,
the system may hang up.
DRAM Timing: The default value is 60ns.
60ns : 2 (faster) Burst Wait State, for 60~70ns Fast Page Mode/EDO DRAM.
70ns : 3 (slower) Burst Wait State, for 70ns Fast Page Mode/EDO DRAM.
DRAM Leadoff Timing: The default value is 10/6/3 (Read Leadoff / Write Leadoff /
RAS# Precharge)
10/6/3 : For EDO / FPM reads and Writes timing.
11/7/3 : For slow EDO /FPM reads and Writes timing.
DRAM Writes Burst Timing: The default value is x222.
x222 : For EDO / FPM of the fast burst mode timings.
x333 : For EDO /FPM of the slow burst mode timings.
Fast EDO Lead off : The default value is Enabled.
Enabled : This field Enables fast timing EDO read cycles.
Disabled : Disables the fast timing EDO read cycles.
Refresh RAS# Assertion : The default value is 4 clks.
4 : This field controls the number of 4 clocks. RAS# is asserted for Refresh.
5 : This field controls the number of 5 clocks. RAS# is asserted for Refresh.
Fast RAS To CAS Delay : The default value is 2.
2 : This field controls a RAS# to CAS# delay is 2.
3 : This field controls a RAS# to CAS# delay is 3.
Fast MA to RAS# Delay : The default value is 2 Clks.
1 Clks : This field controls Memory Address to RAS's timing is 1 HCLKS.
2 Clks : This field controls Memory Address to RAS's timing is 1 HCLKS.
SDRAM (CAS Lat / RAS-to-CAS) : This is reserved for SDRAM only. The default
value is 2 / 2.
2/2 : The delay timing of SDRAM RAS# to CAS# is 2 HCLKS.
3/3 : The delay timing of SDRAM RAS# to CAS# is 3 HCLKS.
SDRAM Speculative Read : The default value is Disabled.
Enabled : Enables the SDRAM speculative read logic.
Disabled : Disables the SDRAM speculative read logic.
System BIOS Cacheable:
Enabled : Allows caching of the system BIOS ROM at F0000h-FFFFFh, resulting
in better system performance. However, if any program writes to this
memory area, a system error may result.
Disabled : System BIOS non-cacheable