User`s manual

Introduction
Page 1-3
Chipset Components
The Intel
®
845 chipset consists of the Memory Controller Hub (MCH), the I/O
Controller Hub (ICH2) and the Firmware Hub (FWH).
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 Memory Controller Hub (MCH)
The MCH provides the interconnect between the DDR SDRAM and the system
logic. It integrates:
- Support for single processor with a data transfer rate of 400/533MHz.
- 200/266MHz DDR SDRAM interface supporting 2GB of DDR SDRAM.
- 2X, 4X, 1.5V AGP interface (Only support 1.5V on AGP interface).
- Downstream hub link for access to the ICH2.
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 I/O Controller Hub (ICH2)
The I/O controller Hub provides the I/O subsystem with access to the rest of
the system. Additionally, it integrates may I/O functions. The ICH integrates:
- Upstream hub link for access to the MCH
- 2 Channel Ultra ATA/33/66/100 Bus Master IDE controller
- USB controller
- SMBus controller
- FWH interface
- LPC interface
- PCI 2.2 interface
- Integrated System Management Controller
- Integrated LAN Controller
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 Firmware Hub (FWH)
The FWH component is a key element to enabling a new security and manage-
ability infrastructure for the PC platform. The device operates under the FWH
interface and protocol. The hardware features of this device include a unique a
Random Number Generator (RNG), register-based locking, and hardware-
based locking.