User`s manual

Introduction
Page 1-2
System Overview
This board is designed with Intel
®
850E chipset. The Intel
®
850E chipset includes
MCH(FW82850E), ICH4(FW82801DB) and FWH three chips. The Intel
®
850E
chipset designed for Intels FC-PGA2 socket 478 package architecture and
support the 4X capability of the AGP 2.0 Interface Specification and 400/
533MHz Direct RDRAM. The 400/533MHz, 32bit, double clocked Direct
RDRAM interface provides 3.2/4.2GB/s access to main memory. A new chipset
component interconnect, the hub interface, is designed into the Intel
®
850E
chipset to provide more efficient communication between chipset components.
Support of AGP 4X, 400/533MHz Direct RDRAM and the hub interface provides
a balanced system architecture for the Pentium
®
4 or later Socket 478 architec-
ture processor minimizing bottlenecks and increasing system performance. By
increasing memory bandwidth to 1.06GB/s through the use of AGP 4X, the Intel
®
850E chipset will deliver the data throughput necessary to take advantage of the
high performance provided by the powerful Pentium
®
4 or later Socket 478
architecture processor.
The Intel
®
850E chipset architecture removes the requirement for the ISA
expansion bus that was traditionally integrated into the I/O subsystem of Intel
chipsets. This removes many of the conflicts experienced when installing
hardware and drivers into legacy ISA systems. The elimination of ISA will provide
true plug-and play for the Intel
®
850E platform.
Intel
®
850E chipset contains three core components: the Memory Controller Hub
(MCH), the I/O Controller Hub (ICH) and the Firmware Hub (FWH). The MCH
integrates the 400/533MHz, Pentium
®
4 processor bus controller, AGP 2.0
controller, 400/533MHz direct RDRAM controller and a high-speed hub interface
for communication with the ICH4. The ICH4 integrates an UltraATA/66/100
controller, USB host controller, LPC interface controller, FWH interface
controller, PCI interface controller, and a hub interface for communication with
the MCH. The Intel
®
850E chipset will provide the data buffering and interface
arbitration required to ensure that system interfaces operate efficiently and
provide the system bandwidth necessary to obtain peak performance the Pentium
®
4 or later Socket 478 architecture.